From: Zhong Yang <yang.zhong@intel.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: yang.zhong@intel.com, Andrew Cooper <andrew.cooper3@citrix.com>,
xen-devel@lists.xen.org
Subject: Re: [PATCH] x86/cpuid: Enable new SSE/AVX/AVX512 cpu features
Date: Tue, 7 Nov 2017 17:34:00 +0800 [thread overview]
Message-ID: <20171107093400.GB3232@yangzhon-Virtual> (raw)
In-Reply-To: <5A0178A6020000780018CCDB@prv-mh.provo.novell.com>
On Tue, Nov 07, 2017 at 01:11:02AM -0700, Jan Beulich wrote:
> >>> On 07.11.17 at 07:28, <yang.zhong@intel.com> wrote:
> > For those new instructions, you mean i also need to support those
> > three instructions(GFNI,VAES and VPCLMULQDQ) in x86_emulate() in PV?
>
> Why three instructions? And why PV? I'm afraid I'm confused, and
> hence I'm afraid simply saying "yes" to your question might not be
> enough.
>
> Jan
Hello Jan,
Sorry for my unclear answer!
My understanding is i need to implement x86 emulator for legacy and VEX
CPU features(GFNI,VAES and VPCLMULQDQ), right?
As for this patch, whether it is suitable for merge into Xen upstream
this time?
x86 emulator patches for some intel's CPU features are in our plan and we
will send those related patches in future.
Regards,
Yang
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next prev parent reply other threads:[~2017-11-07 9:34 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-27 14:18 [PATCH] x86/cpuid: Enable new SSE/AVX/AVX512 cpu features Yang Zhong
2017-11-01 19:29 ` Konrad Rzeszutek Wilk
2017-11-02 0:59 ` Zhong Yang
2017-11-02 17:26 ` Konrad Rzeszutek Wilk
2017-11-06 10:39 ` Jan Beulich
2017-11-07 6:28 ` Zhong Yang
2017-11-07 8:11 ` Jan Beulich
2017-11-07 9:34 ` Zhong Yang [this message]
2017-11-07 9:49 ` Jan Beulich
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