From: Brian Woods <brian.woods@amd.com>
To: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>,
Brian Woods <brian.woods@amd.com>,
Jan Beulich <jbeulich@suse.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
xen-devel@lists.xen.org
Subject: Re: [PATCH 1/2] x86/svm: Add SVME checking for SVM intercepts
Date: Fri, 22 Dec 2017 09:07:38 -0600 [thread overview]
Message-ID: <20171222150738.GA4429@amd.com> (raw)
In-Reply-To: <1bd6230f-de6a-894e-883a-aa734ff8d3e2@oracle.com>
On Thu, Dec 21, 2017 at 11:52:27PM -0500, Boris Ostrovsky wrote:
> s/it/is
Oopsy, thank you.
> I haven't checked all of them but at least for the first two
> (svm_vmexit_do_vmrun() and smv_vmexit_do_vmload()) we check EFER and
> print a similar error message. So it seems they can be handled in the
> switch statement below.
>
> -boris
They are indeed checked in those functions. I also need to check to
make sure that the switching from L2 to L1 is done correctly in cause of
SVME being low. I tested it with Xen and it worked correctly but it
might not be failing correctly. The joys of being under the weather and
forgetting all your mental notes. I'll try to send out a v2 of this
patch today with the corrections.
Thank you for your input.
--
Brian Woods
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next prev parent reply other threads:[~2017-12-22 15:07 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-21 15:26 [PATCH 0/2] Various SVM Patches Brian Woods
2017-12-21 15:26 ` [PATCH 1/2] x86/svm: Add SVME checking for SVM intercepts Brian Woods
2017-12-22 4:52 ` Boris Ostrovsky
2017-12-22 15:07 ` Brian Woods [this message]
2017-12-21 15:26 ` [PATCH 2/2] x86/svm: Add checks for nested HW features Brian Woods
2017-12-22 4:55 ` Boris Ostrovsky
2017-12-22 15:15 ` Andrew Cooper
2018-01-05 15:27 ` Brian Woods
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