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From: Roger Pau Monne <roger.pau@citrix.com>
To: xen-devel@lists.xenproject.org
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>,
	Roger Pau Monne <roger.pau@citrix.com>,
	Jan Beulich <jbeulich@suse.com>
Subject: [PATCH v8 05/11] pci: add support to size ROM BARs to pci_size_mem_bar
Date: Tue, 23 Jan 2018 15:07:29 +0000	[thread overview]
Message-ID: <20180123150735.74779-6-roger.pau@citrix.com> (raw)
In-Reply-To: <20180123150735.74779-1-roger.pau@citrix.com>

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
---
Cc: Jan Beulich <jbeulich@suse.com>
---
Changes since v6:
 - Remove the rom local variable.

Changes since v5:
 - Use the flags field.
 - Introduce a mask local variable.
 - Simplify return.

Changes since v4:
 - New in this version.
---
 xen/drivers/passthrough/pci.c | 28 ++++++++++++++--------------
 xen/include/xen/pci.h         |  1 +
 2 files changed, 15 insertions(+), 14 deletions(-)

diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c
index fb36b20834..bf26027f4c 100644
--- a/xen/drivers/passthrough/pci.c
+++ b/xen/drivers/passthrough/pci.c
@@ -610,11 +610,16 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos,
     uint32_t hi = 0, bar = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev,
                                            sbdf.func, pos);
     uint64_t size;
-
-    ASSERT((bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY);
+    bool is64bits = !(flags & PCI_BAR_ROM) &&
+        (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64;
+    uint32_t mask = (flags & PCI_BAR_ROM) ? (uint32_t)PCI_ROM_ADDRESS_MASK
+                                          : (uint32_t)PCI_BASE_ADDRESS_MEM_MASK;
+
+    ASSERT(!((flags & PCI_BAR_VF) && (flags & PCI_BAR_ROM)));
+    ASSERT((flags & PCI_BAR_ROM) ||
+           (bar & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY);
     pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos, ~0);
-    if ( (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
-         PCI_BASE_ADDRESS_MEM_TYPE_64 )
+    if ( is64bits )
     {
         if ( flags & PCI_BAR_LAST )
         {
@@ -628,10 +633,9 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos,
         hi = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos + 4);
         pci_conf_write32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos + 4, ~0);
     }
-    size = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func, pos) &
-           PCI_BASE_ADDRESS_MEM_MASK;
-    if ( (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
-         PCI_BASE_ADDRESS_MEM_TYPE_64 )
+    size = pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev, sbdf.func,
+                           pos) & mask;
+    if ( is64bits )
     {
         size |= (uint64_t)pci_conf_read32(sbdf.seg, sbdf.bus, sbdf.dev,
                                           sbdf.func, pos + 4) << 32;
@@ -643,14 +647,10 @@ unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos,
     size = -size;
 
     if ( paddr )
-        *paddr = (bar & PCI_BASE_ADDRESS_MEM_MASK) | ((uint64_t)hi << 32);
+        *paddr = (bar & mask) | ((uint64_t)hi << 32);
     *psize = size;
 
-    if ( (bar & PCI_BASE_ADDRESS_MEM_TYPE_MASK) ==
-         PCI_BASE_ADDRESS_MEM_TYPE_64 )
-        return 2;
-
-    return 1;
+    return is64bits ? 2 : 1;
 }
 
 int pci_add_device(u16 seg, u8 bus, u8 devfn,
diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h
index 2f171a8dcc..4cfa774615 100644
--- a/xen/include/xen/pci.h
+++ b/xen/include/xen/pci.h
@@ -191,6 +191,7 @@ const char *parse_pci_seg(const char *, unsigned int *seg, unsigned int *bus,
 
 #define PCI_BAR_VF      (1u << 0)
 #define PCI_BAR_LAST    (1u << 1)
+#define PCI_BAR_ROM     (1u << 2)
 unsigned int pci_size_mem_bar(pci_sbdf_t sbdf, unsigned int pos,
                               uint64_t *paddr, uint64_t *psize,
                               unsigned int flags);
-- 
2.15.1


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  parent reply	other threads:[~2018-01-23 15:08 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-23 15:07 [PATCH v8 00/11] vpci: PCI config space emulation Roger Pau Monne
2018-01-23 15:07 ` [PATCH v8 01/11] vpci: introduce basic handlers to trap accesses to the PCI config space Roger Pau Monne
2018-02-23 15:55   ` Jan Beulich
2018-02-23 16:02     ` Julien Grall
2018-02-23 17:25       ` Roger Pau Monné
2018-02-23 17:45         ` Julien Grall
2018-01-23 15:07 ` [PATCH v8 02/11] x86/mmcfg: add handlers for the PVH Dom0 MMCFG areas Roger Pau Monne
2018-01-23 15:07 ` [PATCH v8 03/11] x86/physdev: enable PHYSDEVOP_pci_mmcfg_reserved for PVH Dom0 Roger Pau Monne
2018-02-23 15:57   ` Jan Beulich
2018-02-23 17:44     ` Paul Durrant
2018-01-23 15:07 ` [PATCH v8 04/11] pci: split code to size BARs from pci_add_device Roger Pau Monne
2018-02-23 15:58   ` Jan Beulich
2018-01-23 15:07 ` Roger Pau Monne [this message]
2018-01-23 15:07 ` [PATCH v8 06/11] xen: introduce rangeset_consume_ranges Roger Pau Monne
2018-01-23 15:07 ` [PATCH v8 07/11] vpci/bars: add handlers to map the BARs Roger Pau Monne
2018-01-29 14:01   ` Roger Pau Monné
2018-01-23 15:07 ` [PATCH v8 08/11] x86/pt: mask MSI vectors on unbind Roger Pau Monne
2018-02-28 11:27   ` Jan Beulich
2018-01-23 15:07 ` [PATCH v8 09/11] vpci/msi: add MSI handlers Roger Pau Monne
2018-02-28 14:10   ` Jan Beulich
2018-01-23 15:07 ` [PATCH v8 10/11] vpci: add a priority parameter to the vPCI register initializer Roger Pau Monne
2018-01-23 15:07 ` [PATCH v8 11/11] vpci/msix: add MSI-X handlers Roger Pau Monne
2018-02-28 14:33   ` Jan Beulich
2018-03-02 14:52     ` Roger Pau Monné

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