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From: Juergen Gross <jgross@suse.com>
To: xen-devel@lists.xenproject.org
Cc: Juergen Gross <jgross@suse.com>,
	andrew.cooper3@citrix.com, dfaggioli@suse.com, jbeulich@suse.com
Subject: [PATCH v3 07/17] xen/x86: split _set_tssldt_desc() into ldt and tss specific functions
Date: Fri,  9 Feb 2018 15:01:41 +0100	[thread overview]
Message-ID: <20180209140151.24714-8-jgross@suse.com> (raw)
In-Reply-To: <20180209140151.24714-1-jgross@suse.com>

_set_tssldt_desc() is used to set LDT or TSS descriptors in the GDT.
As LDT descriptors might be shared across cpus care is taken to not
create a temporary invalid descriptor.

Split _set_tssldt_desc() into dedicated functions for setting either
a LDT or a TSS descriptor. For LDT descriptors this is basically the
same as today, while TSS descriptors can be written without using
barriers as those are written for the local cpu only.

Signed-off-by: Juergen Gross <jgross@suse.com>
---
V3:
- new patch
---
 xen/arch/x86/cpu/common.c  |  4 ++--
 xen/arch/x86/traps.c       |  4 ++--
 xen/include/asm-x86/desc.h | 14 +++++++++++++-
 xen/include/asm-x86/ldt.h  |  2 +-
 4 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 4306e59650..e0ae8120a6 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -755,12 +755,12 @@ void load_system_tables(void)
 		.bitmap = IOBMP_INVALID_OFFSET,
 	};
 
-	_set_tssldt_desc(
+	_set_tss_desc(
 		gdt + TSS_ENTRY,
 		(unsigned long)tss,
 		offsetof(struct tss_struct, __cacheline_filler) - 1,
 		SYS_DESC_tss_avail);
-	_set_tssldt_desc(
+	_set_tss_desc(
 		compat_gdt + TSS_ENTRY,
 		(unsigned long)tss,
 		offsetof(struct tss_struct, __cacheline_filler) - 1,
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 13a852ca4e..9b29014e2c 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -1845,12 +1845,12 @@ void load_TR(void)
         .limit = LAST_RESERVED_GDT_BYTE
     };
 
-    _set_tssldt_desc(
+    _set_tss_desc(
         this_cpu(gdt_table) + TSS_ENTRY - FIRST_RESERVED_GDT_ENTRY,
         (unsigned long)tss,
         offsetof(struct tss_struct, __cacheline_filler) - 1,
         SYS_DESC_tss_avail);
-    _set_tssldt_desc(
+    _set_tss_desc(
         this_cpu(compat_gdt_table) + TSS_ENTRY - FIRST_RESERVED_GDT_ENTRY,
         (unsigned long)tss,
         offsetof(struct tss_struct, __cacheline_filler) - 1,
diff --git a/xen/include/asm-x86/desc.h b/xen/include/asm-x86/desc.h
index 4093c65faa..6ec515582d 100644
--- a/xen/include/asm-x86/desc.h
+++ b/xen/include/asm-x86/desc.h
@@ -171,7 +171,7 @@ static inline void _update_gate_addr_lower(idt_entry_t *gate, void *addr)
     _write_gate_lower(gate, &idte);
 }
 
-#define _set_tssldt_desc(desc,addr,limit,type)           \
+#define _set_ldt_desc(desc,addr,limit,type)              \
 do {                                                     \
     (desc)[0].b = (desc)[1].b = 0;                       \
     smp_wmb(); /* disable entry /then/ rewrite */        \
@@ -185,6 +185,18 @@ do {                                                     \
         (((u32)(addr) & 0x00FF0000U) >> 16);             \
 } while (0)
 
+#define _set_tss_desc(desc,addr,limit,type)              \
+do {                                                     \
+    (desc)[0].a =                                        \
+        ((u32)(addr) << 16) | ((u32)(limit) & 0xFFFF);   \
+    (desc)[0].b =                                        \
+        ((u32)(addr) & 0xFF000000U) |                    \
+        ((u32)(type) << 8) | 0x8000U |                   \
+        (((u32)(addr) & 0x00FF0000U) >> 16);             \
+    (desc)[1].a = (u32)(((unsigned long)(addr)) >> 32);  \
+    (desc)[1].b = 0;                                     \
+} while (0)
+
 struct __packed desc_ptr {
 	unsigned short limit;
 	unsigned long base;
diff --git a/xen/include/asm-x86/ldt.h b/xen/include/asm-x86/ldt.h
index 589daf83c6..6179cef9e9 100644
--- a/xen/include/asm-x86/ldt.h
+++ b/xen/include/asm-x86/ldt.h
@@ -16,7 +16,7 @@ static inline void load_LDT(struct vcpu *v)
         desc = (!is_pv_32bit_vcpu(v)
                 ? this_cpu(gdt_table) : this_cpu(compat_gdt_table))
                + LDT_ENTRY - FIRST_RESERVED_GDT_ENTRY;
-        _set_tssldt_desc(desc, LDT_VIRT_START(v), ents*8-1, SYS_DESC_ldt);
+        _set_ldt_desc(desc, LDT_VIRT_START(v), ents*8-1, SYS_DESC_ldt);
         lldt(LDT_ENTRY << 3);
     }
 }
-- 
2.13.6


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  parent reply	other threads:[~2018-02-09 14:05 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-02-09 14:01 [PATCH v3 00/17] Alternative Meltdown mitigation Juergen Gross
2018-02-09 14:01 ` [PATCH v3 01/17] x86: don't use hypervisor stack size for dumping guest stacks Juergen Gross
2018-02-09 14:01 ` [PATCH v3 02/17] x86: do a revert of e871e80c38547d9faefc6604532ba3e985e65873 Juergen Gross
2018-02-13 10:14   ` Jan Beulich
2018-02-09 14:01 ` [PATCH v3 03/17] x86: revert 5784de3e2067ed73efc2fe42e62831e8ae7f46c4 Juergen Gross
2018-02-09 14:01 ` [PATCH v3 04/17] x86: don't access saved user regs via rsp in trap handlers Juergen Gross
2018-02-09 14:01 ` [PATCH v3 05/17] x86: add a xpti command line parameter Juergen Gross
2018-02-09 14:01 ` [PATCH v3 06/17] x86: allow per-domain mappings without NX bit or with specific mfn Juergen Gross
2018-02-09 14:01 ` Juergen Gross [this message]
2018-02-09 14:01 ` [PATCH v3 08/17] x86: add support for spectre mitigation with local thunk Juergen Gross
2018-02-09 14:01 ` [PATCH v3 09/17] x86: create syscall stub for per-domain mapping Juergen Gross
2018-02-09 14:01 ` [PATCH v3 10/17] x86: allocate per-vcpu stacks for interrupt entries Juergen Gross
2018-02-09 14:01 ` [PATCH v3 11/17] x86: modify interrupt handlers to support stack switching Juergen Gross
2018-02-09 14:01 ` [PATCH v3 12/17] x86: activate per-vcpu stacks in case of xpti Juergen Gross
2018-02-09 14:01 ` [PATCH v3 13/17] x86: allocate hypervisor L4 page table for XPTI Juergen Gross
2018-02-09 14:01 ` [PATCH v3 14/17] xen: add domain pointer to fill_ro_mpt() and zap_ro_mpt() functions Juergen Gross
2018-02-09 14:01 ` [PATCH v3 15/17] x86: fill XPTI shadow pages and keep them in sync with guest L4 Juergen Gross
2018-02-09 14:01 ` [PATCH v3 16/17] x86: do page table switching when entering/leaving hypervisor Juergen Gross
2018-02-09 14:01 ` [PATCH v3 17/17] x86: hide most hypervisor mappings in XPTI shadow page tables Juergen Gross
2018-02-12 17:54 ` [PATCH v3 00/17] Alternative Meltdown mitigation Dario Faggioli
2018-02-13 11:36   ` Juergen Gross
2018-02-13 14:16     ` Jan Beulich
     [not found]     ` <5A83014E02000078001A7619@suse.com>
2018-02-13 14:29       ` Juergen Gross

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