[PATCH] intel_iommu: allow updating FEADDR and FEUADDR with one 64bit write

[PATCH] intel_iommu: allow updating FEADDR and FEUADDR with one 64bit write

[Marek Marczykowski-Górecki]

Allow updating those two adjacent 32bit fields with one 64bit write.
This fixes qemu crash when booting Xen inside.

See discussion on Xen side of the thing here:
http://xen.markmail.org/message/6mrmemrnmhxvaxba

Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
---
 hw/i386/intel_iommu.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index 2e841cde27..d214dce277 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -2129,8 +2129,12 @@ static void vtd_mem_write(void *opaque, hwaddr addr,
 
     /* Fault Event Address Register, 32-bit */
     case DMAR_FEADDR_REG:
-        assert(size == 4);
-        vtd_set_long(s, addr, val);
+        assert(size == 4 || size == 8);
+        if (size == 4) {
+            vtd_set_long(s, addr, val);
+        } else {
+            vtd_set_quad(s, addr, val);
+        }
         break;
 
     /* Fault Event Upper Address Register, 32-bit */
-- 
2.13.6


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Re: [PATCH] intel_iommu: allow updating FEADDR and FEUADDR with one 64bit write

[Marek Marczykowski-Górecki]

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On Wed, Jan 24, 2018 at 03:18:48PM +0100, Marek Marczykowski-Górecki wrote:
> Allow updating those two adjacent 32bit fields with one 64bit write.
> This fixes qemu crash when booting Xen inside.
> 
> See discussion on Xen side of the thing here:
> http://xen.markmail.org/message/6mrmemrnmhxvaxba

Bump.

> Signed-off-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
> ---
>  hw/i386/intel_iommu.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 2e841cde27..d214dce277 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -2129,8 +2129,12 @@ static void vtd_mem_write(void *opaque, hwaddr addr,
>  
>      /* Fault Event Address Register, 32-bit */
>      case DMAR_FEADDR_REG:
> -        assert(size == 4);
> -        vtd_set_long(s, addr, val);
> +        assert(size == 4 || size == 8);
> +        if (size == 4) {
> +            vtd_set_long(s, addr, val);
> +        } else {
> +            vtd_set_quad(s, addr, val);
> +        }
>          break;
>  
>      /* Fault Event Upper Address Register, 32-bit */

-- 
Best Regards,
Marek Marczykowski-Górecki
Invisible Things Lab
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?

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Re: [PATCH] intel_iommu: allow updating FEADDR and FEUADDR with one 64bit write

[Roger Pau Monné]

On Wed, Jan 24, 2018 at 03:18:48PM +0100, Marek Marczykowski-Górecki wrote:
> Allow updating those two adjacent 32bit fields with one 64bit write.
> This fixes qemu crash when booting Xen inside.
>
> See discussion on Xen side of the thing here:
> http://xen.markmail.org/message/6mrmemrnmhxvaxba

Xen code is wrong, see:

https://marc.info/?l=xen-devel&m=150511273303712

Roger.

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