From: Wei Liu <wei.liu2@citrix.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: "Kevin Tian" <kevin.tian@intel.com>,
"Wei Liu" <wei.liu2@citrix.com>,
"Jan Beulich" <JBeulich@suse.com>,
Xen-devel <xen-devel@lists.xen.org>,
"Jun Nakajima" <jun.nakajima@intel.com>,
"Boris Ostrovsky" <boris.ostrovsky@oracle.com>,
"Suravee Suthikulpanit" <suravee.suthikulpanit@amd.com>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [PATCH 2/5] x86/pv: Avoid leaking other guests' MSR_TSC_AUX values into PV context
Date: Tue, 20 Feb 2018 15:32:04 +0000 [thread overview]
Message-ID: <20180220153204.o2kxdq4mebuutxan@citrix.com> (raw)
In-Reply-To: <3c9f5649-6a2b-a3c0-6441-c1fc4d127b06@citrix.com>
On Tue, Feb 20, 2018 at 03:26:20PM +0000, Andrew Cooper wrote:
> On 20/02/18 15:22, Wei Liu wrote:
> > On Tue, Feb 20, 2018 at 11:58:40AM +0000, Andrew Cooper wrote:
> >> If the CPU pipeline supports RDTSCP or RDPID, a guest can observe the value in
> >> MSR_TSC_AUX, irrespective of whether the relevant CPUID features are
> >> advertised/hidden.
> >>
> > This setup works only because CR4.TSD=0?
>
> Having CR4.TSD clear is the default, and means RDTSCP will work at any
> privilege level. Setting CR4.TSD (either due to virtualised TSC, or
> because the guest kernel wants to trap user accesses) will cause RDTSCP
> to trap into emul-priv-op.
>
> There is no way of causing RDPID to trap (on hardware which supports the
> instruction), and it will read read the current value of MSR_TSC_AUX.
Alright.
In any case:
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
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next prev parent reply other threads:[~2018-02-20 15:32 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-02-20 11:58 [RFC PATCH 0/5] x86: Multiple fixes to MSR_TSC_AUX and RDTSCP handling for guests Andrew Cooper
2018-02-20 11:58 ` [PATCH 1/5] x86/hvm: Don't shadow the domain parameter in hvm_save_cpu_msrs() Andrew Cooper
2018-02-20 14:54 ` Roger Pau Monné
2018-02-20 15:12 ` Wei Liu
2018-02-23 13:53 ` Jan Beulich
2018-02-20 11:58 ` [PATCH 2/5] x86/pv: Avoid leaking other guests' MSR_TSC_AUX values into PV context Andrew Cooper
2018-02-20 15:22 ` Wei Liu
2018-02-20 15:26 ` Andrew Cooper
2018-02-20 15:32 ` Wei Liu [this message]
2018-02-20 15:49 ` Roger Pau Monné
2018-02-23 14:04 ` Jan Beulich
2018-02-23 14:22 ` Andrew Cooper
2018-02-23 15:09 ` Jan Beulich
2018-02-26 11:25 ` Jan Beulich
2018-02-26 19:11 ` [ping] " Andrew Cooper
2018-02-27 5:38 ` Tian, Kevin
2018-02-26 19:52 ` Boris Ostrovsky
2018-02-20 11:58 ` [PATCH 3/5] x86/time: Rework pv_soft_rdtsc() to aid further cleanup Andrew Cooper
2018-02-20 15:32 ` Wei Liu
2018-02-20 16:04 ` Roger Pau Monné
2018-02-20 16:07 ` Andrew Cooper
2018-02-23 14:38 ` Jan Beulich
2018-02-20 11:58 ` [PATCH 4/5] x86/pv: Remove deferred RDTSC{, P} handling in pv_emulate_privileged_op() Andrew Cooper
2018-02-20 16:08 ` Wei Liu
2018-02-20 16:28 ` Roger Pau Monné
2018-02-20 16:37 ` Andrew Cooper
2018-02-20 17:40 ` Roger Pau Monné
2018-02-23 14:40 ` Jan Beulich
2018-02-20 11:58 ` [PATCH 5/5] x86: Rework MSR_TSC_AUX handling from scratch Andrew Cooper
2018-02-20 17:03 ` Wei Liu
2018-02-20 17:42 ` Andrew Cooper
2018-02-21 11:08 ` Wei Liu
2018-02-20 17:35 ` Roger Pau Monné
2018-02-20 18:28 ` Andrew Cooper
2018-02-21 10:13 ` Roger Pau Monné
2018-02-21 11:36 ` [PATCH v2 " Andrew Cooper
2018-02-21 12:06 ` Wei Liu
2018-02-21 13:04 ` Roger Pau Monné
2018-02-23 15:05 ` Jan Beulich
2018-02-23 15:51 ` Andrew Cooper
2018-02-26 11:30 ` Jan Beulich
2018-02-26 19:12 ` [RFC PATCH 0/5] x86: Multiple fixes to MSR_TSC_AUX and RDTSCP handling for guests Andrew Cooper
2018-02-26 19:44 ` Boris Ostrovsky
2018-02-26 23:30 ` Andrew Cooper
2018-03-09 18:05 ` Boris Ostrovsky
2018-03-09 18:41 ` Andrew Cooper
2018-03-09 19:10 ` Boris Ostrovsky
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