From: Alexey G <x1917x@gmail.com>
To: "Roger Pau Monné" <roger.pau@citrix.com>
Cc: xen-devel@lists.xenproject.org, Wei Liu <wei.liu2@citrix.com>,
Ian Jackson <ian.jackson@eu.citrix.com>,
Jan Beulich <jbeulich@suse.com>
Subject: Re: [RFC PATCH 10/12] libacpi: build ACPI MCFG table if requested
Date: Tue, 20 Mar 2018 07:46:04 +1000 [thread overview]
Message-ID: <20180320074604.00002a0e@gmail.com> (raw)
In-Reply-To: <20180319173334.dk6hojksp7qjzejq@MacBook-Pro-de-Roger.local>
On Mon, 19 Mar 2018 17:33:34 +0000
Roger Pau Monné <roger.pau@citrix.com> wrote:
>On Tue, Mar 13, 2018 at 04:33:55AM +1000, Alexey Gerasimenko wrote:
>> This adds construct_mcfg() function to libacpi which allows to build
>> MCFG table for a given mmconfig_addr/mmconfig_len pair if the
>> ACPI_HAS_MCFG flag was specified in acpi_config struct.
>>
>> The maximum bus number is calculated from mmconfig_len using
>> MCFG_SIZE_TO_NUM_BUSES macro (1MByte of MMIO space per bus).
>>
>> Signed-off-by: Alexey Gerasimenko <x1917x@gmail.com>
>> ---
>> tools/libacpi/acpi2_0.h | 21 +++++++++++++++++++++
>> tools/libacpi/build.c | 42
>> ++++++++++++++++++++++++++++++++++++++++++ tools/libacpi/libacpi.h
>> | 4 ++++ 3 files changed, 67 insertions(+)
>>
>> diff --git a/tools/libacpi/acpi2_0.h b/tools/libacpi/acpi2_0.h
>> index 2619ba32db..209ad1acd3 100644
>> --- a/tools/libacpi/acpi2_0.h
>> +++ b/tools/libacpi/acpi2_0.h
>> @@ -422,6 +422,25 @@ struct acpi_20_slit {
>> };
>>
>> /*
>> + * PCI Express Memory Mapped Configuration Description Table
>> + */
>> +struct mcfg_range_entry {
>> + uint64_t base_address;
>> + uint16_t pci_segment;
>> + uint8_t start_pci_bus_num;
>> + uint8_t end_pci_bus_num;
>> + uint32_t reserved;
>> +};
>> +
>> +struct acpi_mcfg {
>> + struct acpi_header header;
>> + uint8_t reserved[8];
>> + struct mcfg_range_entry entries[1];
>> +};
>
>I would define this as:
>
>struct acpi_10_mcfg {
> struct acpi_header header;
> uint8_t reserved[8];
> struct acpi_10_mcfg_entry {
> uint64_t base_address;
> uint16_t pci_segment;
> uint8_t start_pci_bus;
> uint8_t end_pci_bus;
> uint32_t reserved;
> } entries[1];
>};
Hmm, a choice of preference, but OK, will move it inside.
>> +
>> +#define MCFG_SIZE_TO_NUM_BUSES(size) ((size) >> 20)
>
>I'm not sure the following macro belongs here. This is not directly
>related to ACPI.
Yeah, pci_regs.h might be better I think.
>> +
>> +/*
>> * Table Signatures.
>> */
>> #define ACPI_2_0_RSDP_SIGNATURE ASCII64('R','S','D','
>> ','P','T','R',' ') @@ -435,6 +454,7 @@ struct acpi_20_slit {
>> #define ACPI_2_0_WAET_SIGNATURE ASCII32('W','A','E','T')
>> #define ACPI_2_0_SRAT_SIGNATURE ASCII32('S','R','A','T')
>> #define ACPI_2_0_SLIT_SIGNATURE ASCII32('S','L','I','T')
>> +#define ACPI_MCFG_SIGNATURE ASCII32('M','C','F','G')
>>
>> /*
>> * Table revision numbers.
>> @@ -449,6 +469,7 @@ struct acpi_20_slit {
>> #define ACPI_1_0_FADT_REVISION 0x01
>> #define ACPI_2_0_SRAT_REVISION 0x01
>> #define ACPI_2_0_SLIT_REVISION 0x01
>> +#define ACPI_1_0_MCFG_REVISION 0x01
>>
>> #pragma pack ()
>>
>> diff --git a/tools/libacpi/build.c b/tools/libacpi/build.c
>> index f9881c9604..5daf1fc5b8 100644
>> --- a/tools/libacpi/build.c
>> +++ b/tools/libacpi/build.c
>> @@ -303,6 +303,37 @@ static struct acpi_20_slit
>> *construct_slit(struct acpi_ctxt *ctxt, return slit;
>> }
>>
>> +static struct acpi_mcfg *construct_mcfg(struct acpi_ctxt *ctxt,
>> + const struct acpi_config
>> *config) +{
>> + struct acpi_mcfg *mcfg;
>> +
>> + /* Warning: this code expects that we have only one PCI segment
>> */
>> + mcfg = ctxt->mem_ops.alloc(ctxt, sizeof(*mcfg), 16);
>> + if (!mcfg)
>
>Coding style.
OK
>> + return NULL;
>> +
>> + memset(mcfg, 0, sizeof(*mcfg));
>> + mcfg->header.signature = ACPI_MCFG_SIGNATURE;
>> + mcfg->header.revision = ACPI_1_0_MCFG_REVISION;
>> + fixed_strcpy(mcfg->header.oem_id, ACPI_OEM_ID);
>> + fixed_strcpy(mcfg->header.oem_table_id, ACPI_OEM_TABLE_ID);
>> + mcfg->header.oem_revision = ACPI_OEM_REVISION;
>> + mcfg->header.creator_id = ACPI_CREATOR_ID;
>> + mcfg->header.creator_revision = ACPI_CREATOR_REVISION;
>> + mcfg->header.length = sizeof(*mcfg);
>
>As said before, if you want to align things, please do it for the
>whole block.
Agree, will reorder lines.
>> +
>> + mcfg->entries[0].base_address = config->mmconfig_addr;
>> + mcfg->entries[0].pci_segment = 0;
>> + mcfg->entries[0].start_pci_bus_num = 0;
>> + mcfg->entries[0].end_pci_bus_num =
>> + MCFG_SIZE_TO_NUM_BUSES(config->mmconfig_len) - 1;
>
>Why not pass the start_bus and end_bus values in acpi_config at least?
start_pci_bus_num will be always 0.
It will be kinda ugly to pass config->mmconfig_addr along with
config->end_pci_bus_num, baseaddr+size combo looks nicer I think.
>> +
>> + set_checksum(mcfg, offsetof(struct acpi_header, checksum),
>> sizeof(*mcfg)); +
>> + return mcfg;;
>
>Double ;;
Oops, missed this one.
>> +}
>> +
>> static int construct_passthrough_tables(struct acpi_ctxt *ctxt,
>> unsigned long *table_ptrs,
>> int nr_tables,
>> @@ -350,6 +381,7 @@ static int construct_secondary_tables(struct
>> acpi_ctxt *ctxt, struct acpi_20_hpet *hpet;
>> struct acpi_20_waet *waet;
>> struct acpi_20_tcpa *tcpa;
>> + struct acpi_mcfg *mcfg;
>> unsigned char *ssdt;
>> static const uint16_t tis_signature[] = {0x0001, 0x0001,
>> 0x0001}; void *lasa;
>> @@ -417,6 +449,16 @@ static int construct_secondary_tables(struct
>> acpi_ctxt *ctxt, printf("CONV disabled\n");
>> }
>>
>> + /* MCFG */
>> + if ( config->table_flags & ACPI_HAS_MCFG )
>> + {
>> + mcfg = construct_mcfg(ctxt, config);
>> + if (!mcfg)
>
>Coding style.
Will fix.
>> + return -1;
>> +
>> + table_ptrs[nr_tables++] = ctxt->mem_ops.v2p(ctxt, mcfg);
>> + }
>> +
>> /* TPM TCPA and SSDT. */
>> if ( (config->table_flags & ACPI_HAS_TCPA) &&
>> (config->tis_hdr[0] == tis_signature[0]) &&
>> diff --git a/tools/libacpi/libacpi.h b/tools/libacpi/libacpi.h
>> index a2efd23b0b..dd85b928e9 100644
>> --- a/tools/libacpi/libacpi.h
>> +++ b/tools/libacpi/libacpi.h
>> @@ -36,6 +36,7 @@
>> #define ACPI_HAS_8042 (1<<13)
>> #define ACPI_HAS_CMOS_RTC (1<<14)
>> #define ACPI_HAS_SSDT_LAPTOP_SLATE (1<<15)
>> +#define ACPI_HAS_MCFG (1<<16)
>>
>> struct xen_vmemrange;
>> struct acpi_numa {
>> @@ -96,6 +97,9 @@ struct acpi_config {
>> uint32_t ioapic_base_address;
>> uint16_t pci_isa_irq_mask;
>> uint8_t ioapic_id;
>> +
>> + uint64_t mmconfig_addr;
>> + uint32_t mmconfig_len;
>
>This interface is quite limited because it only allows us to create a
>single MCFG entry, but since this is not a public interface I guess it
>doesn't matter that much, it can always be expanded when required.
We will be limited to a single MMCONFIG area for a long time I'm
afraid, it will good to move away from the bus 0 limitation first.
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next prev parent reply other threads:[~2018-03-19 21:46 UTC|newest]
Thread overview: 155+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-12 18:33 [RFC PATCH 00/30] Xen Q35 Bringup patches + support for PCIe Extended Capabilities for passed through devices Alexey Gerasimenko
2018-03-12 18:33 ` [RFC PATCH 01/12] libacpi: new DSDT ACPI table for Q35 Alexey Gerasimenko
2018-03-12 19:38 ` Konrad Rzeszutek Wilk
2018-03-12 20:10 ` Alexey G
2018-03-12 20:32 ` Konrad Rzeszutek Wilk
2018-03-12 21:19 ` Alexey G
2018-03-13 2:41 ` Tian, Kevin
2018-03-19 12:43 ` Roger Pau Monné
2018-03-19 13:57 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 02/12] Makefile: build and use new DSDT " Alexey Gerasimenko
2018-03-19 12:46 ` Roger Pau Monné
2018-03-19 14:18 ` Alexey G
2018-03-19 13:07 ` Jan Beulich
2018-03-19 14:10 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 03/12] hvmloader: add function to query an emulated machine type (i440/Q35) Alexey Gerasimenko
2018-03-13 17:26 ` Wei Liu
2018-03-13 17:58 ` Alexey G
2018-03-13 18:04 ` Wei Liu
2018-03-19 12:56 ` Roger Pau Monné
2018-03-19 16:26 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 04/12] hvmloader: add ACPI enabling for Q35 Alexey Gerasimenko
2018-03-13 17:26 ` Wei Liu
2018-03-19 13:01 ` Roger Pau Monné
2018-03-19 23:59 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 05/12] hvmloader: add Q35 DSDT table loading Alexey Gerasimenko
2018-03-19 14:45 ` Roger Pau Monné
2018-03-20 0:15 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 06/12] hvmloader: add basic Q35 support Alexey Gerasimenko
2018-03-19 15:30 ` Roger Pau Monné
2018-03-19 23:44 ` Alexey G
2018-03-20 9:20 ` Roger Pau Monné
2018-03-20 21:23 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 07/12] hvmloader: allocate MMCONFIG area in the MMIO hole + minor code refactoring Alexey Gerasimenko
2018-03-19 15:58 ` Roger Pau Monné
2018-03-19 19:49 ` Alexey G
2018-03-20 8:50 ` Roger Pau Monné
2018-03-20 9:25 ` Paul Durrant
2018-03-21 0:58 ` Alexey G
2018-03-21 9:09 ` Roger Pau Monné
2018-03-21 9:36 ` Paul Durrant
2018-03-21 14:35 ` Alexey G
2018-03-21 14:58 ` Paul Durrant
2018-03-21 14:25 ` Alexey G
2018-03-21 14:54 ` Paul Durrant
2018-03-21 17:41 ` Alexey G
2018-03-21 15:20 ` Roger Pau Monné
2018-03-21 16:56 ` Alexey G
2018-03-21 17:06 ` Paul Durrant
2018-03-22 0:31 ` Alexey G
2018-03-22 9:04 ` Jan Beulich
2018-03-22 9:55 ` Alexey G
2018-03-22 10:06 ` Paul Durrant
2018-03-22 11:56 ` Alexey G
2018-03-22 12:09 ` Jan Beulich
2018-03-22 13:05 ` Alexey G
2018-03-22 13:20 ` Jan Beulich
2018-03-22 14:34 ` Alexey G
2018-03-22 14:42 ` Jan Beulich
2018-03-22 15:08 ` Alexey G
2018-03-23 13:57 ` Paul Durrant
2018-03-23 22:32 ` Alexey G
2018-03-26 9:24 ` Roger Pau Monné
2018-03-26 19:42 ` Alexey G
2018-03-27 8:45 ` Roger Pau Monné
2018-03-27 15:37 ` Alexey G
2018-03-28 9:30 ` Roger Pau Monné
2018-03-28 11:42 ` Alexey G
2018-03-28 12:05 ` Paul Durrant
2018-03-28 10:03 ` Paul Durrant
2018-03-28 14:14 ` Alexey G
2018-03-21 17:15 ` Roger Pau Monné
2018-03-21 22:49 ` Alexey G
2018-03-22 9:29 ` Paul Durrant
2018-03-22 10:05 ` Roger Pau Monné
2018-03-22 10:09 ` Paul Durrant
2018-03-22 11:36 ` Alexey G
2018-03-22 10:50 ` Alexey G
2018-03-22 9:57 ` Roger Pau Monné
2018-03-22 12:29 ` Alexey G
2018-03-22 12:44 ` Roger Pau Monné
2018-03-22 15:31 ` Alexey G
2018-03-23 10:29 ` Paul Durrant
2018-03-23 11:38 ` Jan Beulich
2018-03-23 13:52 ` Paul Durrant
2018-05-29 14:23 ` Jan Beulich
2018-05-29 17:56 ` Alexey G
2018-05-29 18:47 ` Alexey G
2018-05-30 4:32 ` Alexey G
2018-05-30 8:13 ` Jan Beulich
2018-05-31 4:25 ` Alexey G
2018-05-30 8:12 ` Jan Beulich
2018-05-31 5:15 ` Alexey G
2018-06-01 5:30 ` Jan Beulich
2018-06-01 15:53 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 08/12] libxl: Q35 support (new option device_model_machine) Alexey Gerasimenko
2018-03-13 17:25 ` Wei Liu
2018-03-13 17:32 ` Anthony PERARD
2018-03-19 17:01 ` Roger Pau Monné
2018-03-19 22:11 ` Alexey G
2018-03-20 9:11 ` Roger Pau Monné
2018-03-21 16:27 ` Wei Liu
2018-03-21 17:03 ` Anthony PERARD
2018-03-21 16:25 ` Wei Liu
2018-03-12 18:33 ` [RFC PATCH 09/12] libxl: Xen Platform device support for Q35 Alexey Gerasimenko
2018-03-19 15:05 ` Alexey G
2018-03-21 16:32 ` Wei Liu
2018-03-12 18:33 ` [RFC PATCH 10/12] libacpi: build ACPI MCFG table if requested Alexey Gerasimenko
2018-03-19 17:33 ` Roger Pau Monné
2018-03-19 21:46 ` Alexey G [this message]
2018-03-20 9:03 ` Roger Pau Monné
2018-03-20 21:06 ` Alexey G
2018-05-29 14:36 ` Jan Beulich
2018-05-29 18:20 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 11/12] hvmloader: use libacpi to build MCFG table Alexey Gerasimenko
2018-03-14 17:48 ` Alexey G
2018-03-19 17:49 ` Roger Pau Monné
2018-03-19 21:20 ` Alexey G
2018-03-20 8:58 ` Roger Pau Monné
2018-03-20 9:36 ` Jan Beulich
2018-03-20 20:53 ` Alexey G
2018-03-21 7:36 ` Jan Beulich
2018-05-29 14:46 ` Jan Beulich
2018-05-29 17:26 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 12/12] docs: provide description for device_model_machine option Alexey Gerasimenko
2018-03-12 18:33 ` [RFC PATCH 13/30] pc/xen: Xen Q35 support: provide IRQ handling for PCI devices Alexey Gerasimenko
2018-03-14 10:48 ` Paolo Bonzini
[not found] ` <406abf99-4311-f08d-9f61-df72a9a3ef05@redhat.com>
2018-03-14 11:28 ` Alexey G
2018-03-12 18:33 ` [RFC PATCH 14/30] pc/q35: Apply PCI bus BSEL property for Xen PCI device hotplug Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 15/30] q35/acpi/xen: Provide ACPI PCI hotplug interface for Xen on Q35 Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 16/30] q35/xen: Add Xen platform device support for Q35 Alexey Gerasimenko
2018-03-12 19:44 ` Eduardo Habkost
[not found] ` <20180312194406.GX3417@localhost.localdomain>
2018-03-12 20:56 ` Alexey G
2018-03-12 21:44 ` Eduardo Habkost
[not found] ` <20180312214402.GY3417@localhost.localdomain>
2018-03-13 23:49 ` Alexey G
2018-03-13 9:24 ` [Qemu-devel] " Daniel P. Berrangé
2018-03-12 18:34 ` [RFC PATCH 17/30] q35: Fix incorrect values for PCIEXBAR masks Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 18/30] xen/pt: XenHostPCIDevice: provide functions for PCI Capabilities and PCIe Extended Capabilities enumeration Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 19/30] xen/pt: avoid reading PCIe device type and cap version multiple times Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 20/30] xen/pt: determine the legacy/PCIe mode for a passed through device Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 21/30] xen/pt: Xen PCIe passthrough support for Q35: bypass PCIe topology check Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 22/30] xen/pt: add support for PCIe Extended Capabilities and larger config space Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 23/30] xen/pt: handle PCIe Extended Capabilities Next register Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 24/30] xen/pt: allow to hide PCIe Extended Capabilities Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 25/30] xen/pt: add Vendor-specific PCIe Extended Capability descriptor and sizing Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 26/30] xen/pt: add fixed-size PCIe Extended Capabilities descriptors Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 27/30] xen/pt: add AER PCIe Extended Capability descriptor and sizing Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 28/30] xen/pt: add descriptors and size calculation for RCLD/ACS/PMUX/DPA/MCAST/TPH/DPC PCIe Extended Capabilities Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 29/30] xen/pt: add Resizable BAR PCIe Extended Capability descriptor and sizing Alexey Gerasimenko
2018-03-12 18:34 ` [RFC PATCH 30/30] xen/pt: add VC/VC9/MFVC PCIe Extended Capabilities descriptors " Alexey Gerasimenko
2018-03-13 9:21 ` [Qemu-devel] [RFC PATCH 00/30] Xen Q35 Bringup patches + support for PCIe Extended Capabilities for passed through devices Daniel P. Berrangé
2018-03-13 11:37 ` Alexey G
2018-03-13 11:44 ` Daniel P. Berrangé
2018-03-16 17:34 ` Alexey G
2018-03-16 18:26 ` Stefano Stabellini
2018-03-16 18:36 ` Roger Pau Monné
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