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From: Roger Pau Monne <roger.pau@citrix.com>
To: xen-devel@lists.xenproject.org
Cc: Stefano Stabellini <sstabellini@kernel.org>,
	Wei Liu <wei.liu2@citrix.com>,
	Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
	George Dunlap <George.Dunlap@eu.citrix.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Ian Jackson <ian.jackson@eu.citrix.com>, Tim Deegan <tim@xen.org>,
	Julien Grall <julien.grall@arm.com>,
	Jan Beulich <jbeulich@suse.com>,
	Roger Pau Monne <roger.pau@citrix.com>
Subject: [PATCH v3 6/7] vpci/msix: carve p2m hole for MSIX MMIO regions
Date: Tue, 30 Oct 2018 16:41:22 +0100	[thread overview]
Message-ID: <20181030154123.4218-7-roger.pau@citrix.com> (raw)
In-Reply-To: <20181030154123.4218-1-roger.pau@citrix.com>

Make sure the MSIX MMIO regions don't have p2m entries setup, so that
accesses to them trap into the hypervisor and can be handled by vpci.

This is a side-effect of commit 042678762 for PVH Dom0, which added
mappings for all the reserved regions into the Dom0 p2m.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
---
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: George Dunlap <George.Dunlap@eu.citrix.com>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Jan Beulich <jbeulich@suse.com>
Cc: Julien Grall <julien.grall@arm.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Stefano Stabellini <sstabellini@kernel.org>
Cc: Tim Deegan <tim@xen.org>
Cc: Wei Liu <wei.liu2@citrix.com>
---
 xen/drivers/vpci/header.c |  8 ++++++++
 xen/drivers/vpci/msix.c   | 40 +++++++++++++++++++++++++++++++++++++++
 xen/include/xen/vpci.h    |  3 +++
 3 files changed, 51 insertions(+)

diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c
index 4af85d3c02..455dd4fc90 100644
--- a/xen/drivers/vpci/header.c
+++ b/xen/drivers/vpci/header.c
@@ -88,6 +88,14 @@ static void modify_decoding(const struct pci_dev *pdev, bool map, bool rom_only)
     uint16_t cmd;
     unsigned int i;
 
+    /*
+     * Make sure there are no mappings in the MSIX MMIO areas, so that accesses
+     * can be trapped (and emulated) by Xen when the memory decoding bit is
+     * enabled.
+     */
+    if ( map && !rom_only && vpci_make_msix_hole(pdev) )
+        return;
+
     for ( i = 0; i < ARRAY_SIZE(header->bars); i++ )
     {
         if ( !MAPPABLE_BAR(&header->bars[i]) )
diff --git a/xen/drivers/vpci/msix.c b/xen/drivers/vpci/msix.c
index 1960dae123..5759551724 100644
--- a/xen/drivers/vpci/msix.c
+++ b/xen/drivers/vpci/msix.c
@@ -21,6 +21,7 @@
 #include <xen/vpci.h>
 
 #include <asm/msi.h>
+#include <asm/p2m.h>
 
 #define VMSIX_SIZE(num) offsetof(struct vpci_msix, entries[num])
 
@@ -395,6 +396,45 @@ static const struct hvm_mmio_ops vpci_msix_table_ops = {
     .write = msix_write,
 };
 
+int vpci_make_msix_hole(const struct pci_dev *pdev)
+{
+    struct domain *d = pdev->domain;
+    unsigned int i;
+
+    if ( !pdev->vpci->msix )
+        return 0;
+
+    /* Make sure there's a hole for the MSIX table/PBA in the p2m. */
+    for ( i = 0; i < ARRAY_SIZE(pdev->vpci->msix->tables); i++ )
+    {
+        unsigned long start = PFN_DOWN(vmsix_table_addr(pdev->vpci, i));
+        unsigned long end = PFN_DOWN(vmsix_table_addr(pdev->vpci, i) +
+                                     vmsix_table_size(pdev->vpci, i) - 1);
+
+        for ( ; start <= end; start++ )
+        {
+            p2m_type_t t;
+            mfn_t mfn = get_gfn_query(d, start, &t);
+
+            if ( t == p2m_mmio_direct && mfn_x(mfn) == start )
+                    clear_identity_p2m_entry(d, start);
+            else if ( t != p2m_mmio_dm )
+            {
+                put_gfn(d, start);
+                gprintk(XENLOG_WARNING,
+                        "%04x:%02x:%02x.%u: existing mapping (mfn: %" PRI_mfn
+                        "type: %d) at %#lx clobbers MSIX MMIO area\n",
+                        pdev->seg, pdev->bus, PCI_SLOT(pdev->devfn),
+                        PCI_FUNC(pdev->devfn), mfn_x(mfn), t, start);
+                return -EEXIST;
+            }
+            put_gfn(d, start);
+        }
+    }
+
+    return 0;
+}
+
 static int init_msix(struct pci_dev *pdev)
 {
     struct domain *d = pdev->domain;
diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h
index f97c48a8f1..e0c22ad81c 100644
--- a/xen/include/xen/vpci.h
+++ b/xen/include/xen/vpci.h
@@ -151,6 +151,9 @@ struct vpci_vcpu {
 #ifdef __XEN__
 void vpci_dump_msi(void);
 
+/* Make sure there's a hole in the p2m for the MSIX mmio areas. */
+int vpci_make_msix_hole(const struct pci_dev *pdev);
+
 /* Arch-specific vPCI MSI helpers. */
 void vpci_msi_arch_mask(struct vpci_msi *msi, const struct pci_dev *pdev,
                         unsigned int entry, bool mask);
-- 
2.19.1


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  parent reply	other threads:[~2018-10-30 15:41 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-30 15:41 [PATCH v3 0/7] x86/pvh: fix fixes for PVH Dom0 Roger Pau Monne
2018-10-30 15:41 ` [PATCH v3 1/7] x86/pvh: fix TSC mode setup " Roger Pau Monne
2018-10-30 15:41 ` [PATCH v3 2/7] x86/hvm: introduce a define for the debug output IO port Roger Pau Monne
2018-10-31 16:36   ` Wei Liu
2018-10-30 15:41 ` [PATCH v3 3/7] x86/pvh: allow PVH Dom0 to use the debug IO port console Roger Pau Monne
2018-10-30 16:27   ` Wei Liu
2018-10-30 15:41 ` [PATCH v3 4/7] vpci: fix updating the command register Roger Pau Monne
2018-11-05 16:46   ` Jan Beulich
2018-11-07 10:47     ` Roger Pau Monné
2018-11-07 15:00       ` Jan Beulich
2018-10-30 15:41 ` [PATCH v3 5/7] vpci: fix execution of long running operations Roger Pau Monne
2018-11-05 16:56   ` Jan Beulich
2018-11-07 11:11     ` Roger Pau Monné
2018-11-07 15:06       ` Jan Beulich
2018-11-07 17:15         ` Roger Pau Monné
2018-11-08  9:55           ` Jan Beulich
2018-11-08 11:29             ` Roger Pau Monné
2018-11-08 11:42               ` Julien Grall
2018-11-08 11:44                 ` Roger Pau Monné
2018-11-08 11:52                   ` Julien Grall
2018-11-08 12:20                     ` Roger Pau Monné
2018-11-08 12:38                       ` Julien Grall
2018-11-08 12:32               ` Jan Beulich
2018-11-08 12:47                 ` Roger Pau Monné
2018-11-08 13:04                   ` Jan Beulich
2018-11-08 13:20                     ` Roger Pau Monné
     [not found]                       ` <791E55F8020000889527FA34@prv1-mh.provo.novell.com>
2018-11-08 16:25                         ` Jan Beulich
2018-11-08 16:59                           ` Roger Pau Monné
     [not found]                             ` <E720D0C40200003B9527FA34@prv1-mh.provo.novell.com>
2018-11-09  8:02                               ` Jan Beulich
2018-10-30 15:41 ` Roger Pau Monne [this message]
2018-11-05 17:07   ` [PATCH v3 6/7] vpci/msix: carve p2m hole for MSIX MMIO regions Jan Beulich
2018-11-07 11:33     ` Roger Pau Monné
2018-10-30 15:41 ` [PATCH v3 7/7] amd/pvh: enable ACPI C1E disable quirk on PVH Dom0 Roger Pau Monne
2018-10-30 16:28   ` Wei Liu
2018-10-31 17:44   ` Boris Ostrovsky
2018-11-02  9:06   ` Jan Beulich
2018-11-07 10:24     ` Roger Pau Monné

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