From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jaeyong Yoo Subject: Re: [PATCH RFC 3/4] Implement save and restore for gic (template impl) Date: Wed, 05 Jun 2013 10:29:25 +0000 (GMT) Message-ID: <26059724.34651370428164476.JavaMail.weblogic@epv6ml01> Reply-To: jaeyong.yoo@samsung.com Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: MIME-version: 1.0 List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell Cc: "xen-devel@lists.xen.org" List-Id: xen-devel@lists.xenproject.org > > +static int gic_save(struct domain *d, hvm_domain_context_t *h) > > +{ > > + struct hvm_hw_gic ctxt; > > + struct vcpu *v; > > + > > + /* Save the state of GICs */ > > + for_each_vcpu( d, v ) > > + { > > + ctxt.gic_hcr = v->arch.gic_hcr; > > + ctxt.gic_vmcr = v->arch.gic_vmcr; > > + ctxt.gic_apr = v->arch.gic_apr; > > + memcpy( ctxt.gic_lr, v->arch.gic_lr, sizeof(v->arch.gic_lr) ); > > + ctxt.event_mask = v->arch.event_mask; > > + ctxt.lr_mask = v->arch.lr_mask; > > In general on x86 the policy is that hvm headers should store only > architectural state. I think this is a good policy to carry over to ARM. > > With that in mind I don't think either event_mask or lr_mask are > architectural state but are actually internal state of the vgic > "emulation" which can and should be reconstructed when loading the > architectural state. Thanks! That is very helpful :) Jaeyong