[PATCH 3 of 6] APIC: add crash_disable_local_APIC

[Andrew Cooper <andrew.cooper3@citrix.com>]

This new function is needed because on an SMP system, we are
not likely to be crashing on the BootStrap Processor.  As a result,
we need to leave the crashing CPU in the state that the BSP was
booted with, so that the kdump kernel can take over as if it
were booting on the real BSP.

diff -r 17991cc69e88 -r 2f91c312ade5 xen/arch/x86/apic.c
--- a/xen/arch/x86/apic.c	Wed May 25 15:10:52 2011 +0100
+++ b/xen/arch/x86/apic.c	Wed May 25 15:11:58 2011 +0100
@@ -375,6 +375,56 @@ void disable_local_APIC(void)
     }
 }
 
+void crash_disable_local_APIC(bool_t crashing_cpu)
+{
+    u64 msr_contents;
+
+    clear_local_APIC();
+
+    /*
+     * Disable APIC (implies clearing of registers
+     * for 82489DX!).
+     */
+    apic_write_around(APIC_SPIV,
+        apic_read(APIC_SPIV) & ~APIC_SPIV_APIC_ENABLED);
+
+    /* Always disable the APIC */
+    rdmsrl(MSR_IA32_APICBASE, msr_contents);
+    msr_contents &= ~ ( MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD );
+    wrmsrl(MSR_IA32_APICBASE, msr_contents);
+
+    /* If we are the crashing processor, stick the local apic back to how we found
+     * it on boot, on the bootstrap processor. The crashdump kernel knows that it
+     * may not be booting on the real bootstrap processor. */
+    if( crashing_cpu )
+    {
+        switch(apic_boot_mode)
+        {
+        case APIC_MODE_DISABLED:
+            break; /* Nothing to do - we did this above */
+        case APIC_MODE_XAPIC:
+        {
+            msr_contents |= MSR_IA32_APICBASE_ENABLE;
+            wrmsrl(MSR_IA32_APICBASE, msr_contents);
+            break;
+        }
+        case APIC_MODE_X2APIC:
+        {
+            msr_contents |= ( MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD );
+            wrmsrl(MSR_IA32_APICBASE, msr_contents);
+            break;
+        }
+        default:
+        {
+            printk("Hit default case when reverting lapic to boot state on core #%d\n",
+                   smp_processor_id());
+            break;
+        }
+        }
+    }
+}
+
+
 /*
  * This is to verify that we're looking at a real local APIC.
  * Check these against your board if the CPUs aren't getting
diff -r 17991cc69e88 -r 2f91c312ade5 xen/include/asm-x86/apic.h
--- a/xen/include/asm-x86/apic.h	Wed May 25 15:10:52 2011 +0100
+++ b/xen/include/asm-x86/apic.h	Wed May 25 15:11:58 2011 +0100
@@ -195,6 +195,7 @@ extern void clear_local_APIC(void);
 extern void connect_bsp_APIC (void);
 extern void disconnect_bsp_APIC (int virt_wire_setup);
 extern void disable_local_APIC (void);
+extern void crash_disable_local_APIC (bool_t crashing_cpu);
 extern int verify_local_APIC (void);
 extern void cache_APIC_registers (void);
 extern void sync_Arb_IDs (void);