From: Julien Grall <julien.grall@linaro.org>
To: mjaggi@caviumnetworks.com, xen-devel@lists.xen.org,
marc.zyngier@arm.com, sstabellini@kernel.org,
andre.przywara@linaro.org
Cc: manish.jaggi@cavium.com
Subject: Re: [PATCH 03/10] arm64: Add ICV_BPR1_EL1 handler
Date: Thu, 25 Jan 2018 16:44:19 +0000 [thread overview]
Message-ID: <359be159-7f32-adc5-3f8e-42e9024df525@linaro.org> (raw)
In-Reply-To: <20180116154305.19186-4-mjaggi@caviumnetworks.com>
Hi Manish,
On 16/01/18 15:42, mjaggi@caviumnetworks.com wrote:
> From: Manish Jaggi <manish.jaggi@cavium.com>
>
> Add a handler for reading/writing the guest's view of the ICC_BPR1_EL1
> register, which is located in the ICH_VMCR_EL2.BPR1 field.
This commit (and likely the followings) is coming from Linux, right? If
it matches commit from Linux, then you need to keep tags and point to
the Linux commit. See commit 7762c2d6f4 in Xen as an example to how to
do it.
If you make changes for Xen, then write "Adapted for Xen...".
But looking at the patch the major difference is you use Xen coding
style. The rest is pretty much use Xen name for access register and
adding missing define.
I think it would be beneficial for Xen to re-use Linux code. The
compatibility layer should be very limited. Stefano any opinions?
Cheers,
--
Julien Grall
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next prev parent reply other threads:[~2018-01-25 16:44 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-01-16 15:42 [RFC PATCH 00/10] arm64: Mediate access to GICv3 sysregs at EL2 mjaggi
2018-01-16 15:42 ` [RFC PATCH 01/10] Add CONFIG_VGIC_ERRATA mjaggi
2018-01-25 13:48 ` Julien Grall
2018-02-21 15:17 ` Manish Jaggi
2018-02-21 15:56 ` Julien Grall
2018-01-16 15:42 ` [RFC PATCH 02/10] arm64: Add hook to handle guest GICv3 sysreg accesses mjaggi
2018-01-25 16:17 ` Julien Grall
2018-01-25 18:07 ` Julien Grall
2018-02-01 8:51 ` Manish Jaggi
2018-02-01 10:54 ` Julien Grall
2018-02-26 6:42 ` Manish Jaggi
2018-02-26 6:58 ` Manish Jaggi
2018-02-26 10:43 ` Julien Grall
2018-01-16 15:42 ` [PATCH 03/10] arm64: Add ICV_BPR1_EL1 handler mjaggi
2018-01-25 16:44 ` Julien Grall [this message]
2018-02-01 8:57 ` Manish Jaggi
2018-02-01 10:55 ` Julien Grall
2018-01-16 15:42 ` [PATCH 04/10] arm64: Add ICV_IGRPEN1_EL1 handler mjaggi
2018-01-16 15:43 ` [PATCH 05/10] arm64: Add accessors for the ICH_APxRn_EL2 registers mjaggi
2018-01-16 15:43 ` [PATCH 06/10] Expose gicv3_ich_read/write_lr mjaggi
2018-01-25 16:52 ` Julien Grall
2018-02-01 8:54 ` Manish Jaggi
2018-01-16 15:43 ` [PATCH 07/10] arm64: Add ICV_IAR1_EL1 handler mjaggi
2018-01-16 15:43 ` [PATCH 08/10] Add ICV_EOIR1_EL1 handler mjaggi
2018-01-16 15:43 ` [PATCH 09/10] arm64: Add a handler for ICV_HPPIR1_EL1 mjaggi
2018-01-16 15:43 ` [PATCH 10/10] Enable Trapping of Group1 registers which is controlled by command line mjaggi
2018-01-25 17:00 ` Julien Grall
2018-02-01 8:53 ` Manish Jaggi
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