From: Julien Grall <julien.grall@linaro.org>
To: "Jaggi, Manish" <Manish.Jaggi@cavium.com>,
xen-devel <xen-devel@lists.xenproject.org>,
Stefano Stabellini <sstabellini@kernel.org>
Cc: "Edgar Iglesias (edgar.iglesias@xilinx.com)"
<edgar.iglesias@xilinx.com>,
"Kapoor, Prasun" <Prasun.Kapoor@cavium.com>,
"Nair, Jayachandran" <Jayachandran.Nair@cavium.com>,
"Wei Chen" <Wei.Chen@arm.com>,
"Campbell Sean" <scampbel@codeaurora.org>,
"Jiandi An" <anjiandi@codeaurora.org>,
"Punit Agrawal" <punit.agrawal@arm.com>,
"alistair.francis@xilinx.com" <alistair.francis@xilinx.com>,
"Roger Pau Monné" <roger.pau@citrix.com>,
"Shanker Donthineni" <shankerd@codeaurora.org>,
"Steve Capper" <Steve.Capper@arm.com>
Subject: Re: [early RFC] ARM PCI Passthrough design document
Date: Thu, 29 Dec 2016 19:38:26 +0000 [thread overview]
Message-ID: <35d99ebb-13d6-4835-7c67-ea293e589922@linaro.org> (raw)
In-Reply-To: <BY1PR0701MB159424C857F76F5865FC96E7EC6B0@BY1PR0701MB1594.namprd07.prod.outlook.com>
On 29/12/2016 18:41, Jaggi, Manish wrote:
> Hi Julien,
Please configure you e-mail client to properly quote a e-mail. The
[manish] solution is hard to read.
> ------------------------------------------------------------------------
> *From:* Julien Grall <julien.grall@linaro.org>
> *Sent:* Thursday, December 29, 2016 10:33 PM
> *To:* Jaggi, Manish; xen-devel; Stefano Stabellini
> *Cc:* Edgar Iglesias (edgar.iglesias@xilinx.com); Steve Capper; Punit
> Agrawal; Wei Chen; Campbell Sean; Shanker Donthineni; Jiandi An; Roger
> Pau Monné; alistair.francis@xilinx.com; Kapoor, Prasun; Nair, Jayachandran
> *Subject:* Re: [early RFC] ARM PCI Passthrough design document
>
>
>
> On 29/12/2016 14:16, Jaggi, Manish wrote:
>> Hi Julien,
>
> Hello Manish,
>
>>
>> Wouldnt it be better if the design proposed by cavium be extended by
>> discussions and comeup with an agreeable to all design.
>
> As I mentioned in my mail, this design is a completely different
> approach (emulation vs PV).
> [manish] It would have been better if you had suggested in the design
> posted by me, that the following 1.2.3 points would change.
> Since a design is already been posted, it makes sense to focus on that
> and reach a common understanding. And is a bit _rude_.
Before saying it is rude, beware there was a gap of more than a year
between v4 and v5. I also warned you on IRC that I was working on a new
design document the last couple of months. So please don't do the person
that was not aware.
>
> This is a distinct proposal because
> emulation vs PV impact a lot the overall design.
>
> [manish] There are 3 aspects
> a. changes needed in Xen / Dom0 for
> - registering of pci host controller driver in xen
> - mapping between sdbf and streamid
> - adding enumerated pci devices to xen dom0
> - making devices use SMMU in dom0
>
> b.1 How domU is assigned a PCI device.
> b.2 How a domU PCI driver reads configuration space
> I think only at this point PV vs emulation matters. As of now the
> frontend backend driver allow reading PCI space.
> Adding an its node in domU device tree will make traps to xen for ITS
> emulation.
>
> c. DT vs ACPI
> I havent seen in your design how it is captured to support both dt and
> acpi together.
> A good appraoch would be to extend Draft5 with ACPI.
Please read again section "Information available in the firmware tables".
>
>> I didnt see any comments on the one I posted.
>
> Whilst I haven't commented on your design document, I have read
> carefully your last version of the design. But even after 5 version and
> nearly 2 years of work this is still DT and ITS focused.
> [manish] Two reasons for that
> a) PCI driver in linux was evolving and only after msi-map we have a way
> to map sbdf with steamID
You are wrong here. msi-map is only here to do the mapping between RID
and DeviceID. Not between RID and StreamID. Please read again the
documentation (Documentation/devicetree/bindings/pci/pci-msi.txt). For
RID to StreamID you want to look at the property iommu-map
(Documentation/devicetree/bindings/pci/pci-iommu.txt).
[...]
>
> No words about
> interrupt legacy,
> [Manish] At the time of Xen dev summit 2015 we agreed to keep legacy as
> a secondary item, so that we can get something in xen for PCI pt.
Even if we don't implement it right now, we need to have a think about
it as this may modify the overall design. What I want to avoid is have
to redo everything in the future just because we knowingly ignored a bit.
> no words about ACPI... And as you can see in this
> draft, ACPI will have an impact on the overall.
>
> Some part of this design document is based on all the discussion we had
> over last year on your design. However, most of the comments have not
> been addressed despite the fact they have been repeated multiple time by
> various reviewers. For example the bus number has not been added
> PHYSDEVOP_pci_host_bridge_add as requested in one of the first version
> of the design.
> [manish] I disagree, since the same pci node is passed to dom0 and xen
> and it has a bus-nr property
> there is no need for it.
It is a bit annoying to have to repeat this, PCI passthrough is not only
for the DT/ITS use case but also ACPI, GICv2m... This hypercall will be
part of the stable ABI. Once it is defined, it can never change. So we
have to make it correct from the beginning.
If you still disagree, please explain why. Ignoring a request is not the
right thing to do if you want to see people reviewing your design document.
> Moreover this hypercall was suggested by Ian and the requirement was to
> only add segno so that xen and dom0 bind to a PCI RC.
>
>> Putting an altogether new design without commenting on the one posted a
>> month back, might not be a right approach
>
> Speaking for myself, my bandwidth is limited and I am going to
> prioritize review on series where my comments have been addressed.
>
> [manish] All have limited bandwidth and priorities are loaded. Your
> comments are dully taken care of in the document, espcially
> sbdf-streamID mapping.
No it is not. You are still mixing DeviceID and StreamID. You added an
hypercall without any justification and way to use it. I know we
discussed about this on v4 and I was concerned about quirk for platform
with a wrong RID. I was expecting from you to check if my concern was
valid and come up with a justification.
Anyway, you are focusing on one comment, and not looking at the rest of
them.
> I would have appreciated that you could have sent a draft 6 with your
> additions so that a good design be produced.
I already explained why I have sent a separate design document. I have
been writing this design document before you sent the v5.
I first thought about re-using your design doc as a skeleton. But it was
not fitting the way I wanted to describe the approach. Currently, I
don't care about the implementation details. The important bits is the
high level architecture and the justifications.
Cheers,
--
Julien Grall
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next prev parent reply other threads:[~2016-12-29 19:38 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-29 14:04 [early RFC] ARM PCI Passthrough design document Julien Grall
2016-12-29 14:16 ` Jaggi, Manish
2016-12-29 17:03 ` Julien Grall
2016-12-29 18:41 ` Jaggi, Manish
2016-12-29 19:38 ` Julien Grall [this message]
2017-01-04 0:24 ` Stefano Stabellini
2017-01-24 14:28 ` Julien Grall
2017-01-24 20:07 ` Stefano Stabellini
2017-01-25 11:21 ` Roger Pau Monné
2017-01-25 18:53 ` Julien Grall
2017-01-31 16:53 ` Edgar E. Iglesias
2017-01-31 17:09 ` Julien Grall
2017-01-31 19:06 ` Edgar E. Iglesias
2017-01-31 22:08 ` Stefano Stabellini
2017-02-01 19:04 ` Julien Grall
2017-02-01 19:31 ` Stefano Stabellini
2017-02-01 20:24 ` Julien Grall
2017-02-02 15:33 ` Edgar E. Iglesias
2017-02-02 23:12 ` Stefano Stabellini
2017-02-02 23:44 ` Edgar E. Iglesias
2017-02-10 1:01 ` Stefano Stabellini
2017-02-13 15:39 ` Julien Grall
2017-02-13 19:59 ` Stefano Stabellini
2017-02-14 17:21 ` Julien Grall
2017-02-14 18:20 ` Stefano Stabellini
2017-02-14 20:18 ` Julien Grall
2017-02-13 15:35 ` Julien Grall
2017-02-22 4:03 ` Edgar E. Iglesias
2017-02-23 16:47 ` Julien Grall
2017-03-02 21:13 ` Edgar E. Iglesias
2017-02-02 15:40 ` Roger Pau Monné
2017-02-13 16:22 ` Julien Grall
2017-01-31 21:58 ` Stefano Stabellini
2017-02-01 20:12 ` Julien Grall
2017-02-01 10:55 ` Roger Pau Monné
2017-02-01 18:50 ` Stefano Stabellini
2017-02-10 9:48 ` Roger Pau Monné
2017-02-10 10:11 ` Paul Durrant
2017-02-10 12:57 ` Roger Pau Monne
2017-02-10 13:02 ` Paul Durrant
2017-02-10 21:04 ` Stefano Stabellini
2017-02-02 12:38 ` Julien Grall
2017-02-02 23:06 ` Stefano Stabellini
2017-03-08 19:06 ` Julien Grall
2017-03-08 19:12 ` Konrad Rzeszutek Wilk
2017-03-08 19:55 ` Stefano Stabellini
2017-03-08 21:51 ` Julien Grall
2017-03-09 2:59 ` Roger Pau Monné
2017-03-09 11:17 ` Konrad Rzeszutek Wilk
2017-03-09 13:26 ` Julien Grall
2017-03-10 0:29 ` Konrad Rzeszutek Wilk
2017-03-10 3:23 ` Roger Pau Monné
2017-03-10 15:28 ` Konrad Rzeszutek Wilk
2017-03-15 12:07 ` Roger Pau Monné
2017-03-15 12:42 ` Konrad Rzeszutek Wilk
2017-03-15 12:56 ` Roger Pau Monné
2017-03-15 15:11 ` Venu Busireddy
2017-03-15 16:38 ` Roger Pau Monn?
2017-03-15 16:54 ` Venu Busireddy
2017-03-15 17:00 ` Roger Pau Monn?
2017-05-03 12:38 ` Julien Grall
2017-05-03 12:53 ` Julien Grall
2017-01-25 4:23 ` Manish Jaggi
2017-01-06 15:12 ` Roger Pau Monné
2017-01-06 21:16 ` Stefano Stabellini
2017-01-24 17:17 ` Julien Grall
2017-01-25 11:42 ` Roger Pau Monné
2017-01-31 15:59 ` Julien Grall
2017-01-31 22:03 ` Stefano Stabellini
2017-02-01 10:28 ` Roger Pau Monné
2017-02-01 18:45 ` Stefano Stabellini
2017-01-06 16:27 ` Edgar E. Iglesias
2017-01-06 21:12 ` Stefano Stabellini
2017-01-09 17:50 ` Edgar E. Iglesias
2017-01-19 5:09 ` Manish Jaggi
2017-01-24 17:43 ` Julien Grall
2017-01-25 4:37 ` Manish Jaggi
2017-01-25 15:25 ` Julien Grall
2017-01-30 7:41 ` Manish Jaggi
2017-01-31 13:33 ` Julien Grall
2017-05-19 6:38 ` Goel, Sameer
2017-05-19 16:48 ` Julien Grall
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