From: Julien Grall <julien.grall@arm.com>
To: Andre Przywara <andre.przywara@linaro.org>,
Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org
Subject: Re: [PATCH 08/17] ARM: VGIC: rename gic_event_needs_delivery()
Date: Mon, 12 Mar 2018 11:10:54 +0000 [thread overview]
Message-ID: <395992b5-aee5-3ff2-b00e-ea7b95a15c47@arm.com> (raw)
In-Reply-To: <20180309151133.31371-9-andre.przywara@linaro.org>
Hi,
On 09/03/18 15:11, Andre Przywara wrote:
> gic_event_needs_delivery() is not named very intuitively, especially
> the gic_ prefix is somewhat misleading.
> Rename it to vgic_pending_irq(), which makes it clear that this relates > to the virtual GIC and is about interrupts.
It looks like the commit message hasn't been updated. Also, could you
mention in the commit message that you added a new parameter.
Cheers,
>
> Signed-off-by: Andre Przywara <andre.przywara@linaro.org>
> ---
> Changelog:
> - Add vcpu parameter
> - Rename to vgic_vcpu_pending_irq()
>
> xen/arch/arm/gic-vgic.c | 16 ++++++++++++++--
> xen/include/asm-arm/event.h | 2 +-
> xen/include/asm-arm/gic.h | 2 +-
> 3 files changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c
> index c0fe38fd37..f4c98bffd1 100644
> --- a/xen/arch/arm/gic-vgic.c
> +++ b/xen/arch/arm/gic-vgic.c
> @@ -339,9 +339,18 @@ void gic_clear_pending_irqs(struct vcpu *v)
> gic_remove_from_lr_pending(v, p);
> }
>
> -int gic_events_need_delivery(void)
> +/**
> + * vgic_vcpu_pending_irq() - determine if interrupts need to be injected
> + * @vcpu: The vCPU on which to check for interrupts.
> + *
> + * Checks whether there is an interrupt on the given VCPU which needs
> + * handling in the guest. This requires at least one IRQ to be pending
> + * and enabled.
> + *
> + * Returns: 1 if the guest should run to handle interrupts, 0 otherwise.
> + */
> +int vgic_vcpu_pending_irq(struct vcpu *v)
> {
> - struct vcpu *v = current;
> struct pending_irq *p;
> unsigned long flags;
> const unsigned long apr = gic_hw_ops->read_apr(0);
> @@ -349,6 +358,9 @@ int gic_events_need_delivery(void)
> int active_priority;
> int rc = 0;
>
> + /* We rely on reading the VMCR, which is only accessible locally. */
> + ASSERT(v == current);
> +
> mask_priority = gic_hw_ops->read_vmcr_priority();
> active_priority = find_next_bit(&apr, 32, 0);
>
> diff --git a/xen/include/asm-arm/event.h b/xen/include/asm-arm/event.h
> index e8c2a6cb44..c7a415ef57 100644
> --- a/xen/include/asm-arm/event.h
> +++ b/xen/include/asm-arm/event.h
> @@ -24,7 +24,7 @@ static inline int local_events_need_delivery_nomask(void)
> * interrupts disabled so this shouldn't be a problem in the general
> * case.
> */
> - if ( gic_events_need_delivery() )
> + if ( vgic_vcpu_pending_irq(current) )
> return 1;
>
> if ( !vcpu_info(current, evtchn_upcall_pending) )
> diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h
> index 3b2d0217a6..ff0b22451b 100644
> --- a/xen/include/asm-arm/gic.h
> +++ b/xen/include/asm-arm/gic.h
> @@ -238,7 +238,7 @@ int gic_remove_irq_from_guest(struct domain *d, unsigned int virq,
>
> extern void vgic_sync_to_lrs(void);
> extern void gic_clear_pending_irqs(struct vcpu *v);
> -extern int gic_events_need_delivery(void);
> +extern int vgic_vcpu_pending_irq(struct vcpu *v);
>
> extern void init_maintenance_interrupt(void);
> extern void gic_raise_guest_irq(struct vcpu *v, unsigned int irq,
>
--
Julien Grall
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next prev parent reply other threads:[~2018-03-12 11:10 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-09 15:11 [PATCH 00/17] ARM: vGIC: prepare for splitting the vGIC code Andre Przywara
2018-03-09 15:11 ` [PATCH 01/17] ARM: vGICv3: clarify on GUEST_GICV3_RDIST_REGIONS symbol Andre Przywara
2018-03-09 15:11 ` [PATCH 02/17] ARM: GICv3: use hardware GICv3 redistributor values for Dom0 Andre Przywara
2018-03-09 15:11 ` [PATCH 03/17] ARM: vGICv3: always use architected redist stride Andre Przywara
2018-03-12 11:08 ` Julien Grall
2018-03-09 15:11 ` [PATCH 04/17] ARM: vGICv3: remove rdist_stride from VGIC structure Andre Przywara
2018-03-09 15:11 ` [PATCH 05/17] ARM: VGIC: rename gic_inject() and gic_clear_lrs() Andre Przywara
2018-03-09 15:11 ` [PATCH 06/17] ARM: VGIC: Move gic_remove_from_lr_pending() prototype Andre Przywara
2018-03-09 15:11 ` [PATCH 07/17] ARM: VGIC: Adjust domain_max_vcpus() to be VGIC specific Andre Przywara
2018-03-12 11:09 ` Julien Grall
2018-03-09 15:11 ` [PATCH 08/17] ARM: VGIC: rename gic_event_needs_delivery() Andre Przywara
2018-03-12 11:10 ` Julien Grall [this message]
2018-03-09 15:11 ` [PATCH 09/17] ARM: VGIC: change to level-IRQ compatible IRQ injection interface Andre Przywara
2018-03-12 11:29 ` Julien Grall
2018-03-09 15:11 ` [PATCH 10/17] ARM: VGIC: carve out struct vgic_cpu and struct vgic_dist Andre Przywara
2018-03-09 15:11 ` [PATCH 11/17] ARM: VGIC: reorder prototypes in vgic.h Andre Przywara
2018-03-09 15:11 ` [PATCH 12/17] ARM: VGIC: Introduce gic_get_nr_lrs() Andre Przywara
2018-03-09 15:11 ` [PATCH 13/17] ARM: GICv3: rename HYP interface definitions to use ICH_ prefix Andre Przywara
2018-03-09 15:11 ` [PATCH 14/17] ARM: Implement vcpu_kick() Andre Przywara
2018-03-12 11:41 ` Julien Grall
2018-03-09 15:11 ` [PATCH 15/17] ARM: GICv2: introduce gicv2_poke_irq() Andre Przywara
2018-03-09 15:11 ` [PATCH 16/17] ARM: GICv3: poke_irq: make RWP optional Andre Przywara
2018-03-09 15:11 ` [PATCH 17/17] ARM: GICv2: fix GICH_V2_LR definitions Andre Przywara
2018-03-12 12:08 ` [PATCH 00/17] ARM: vGIC: prepare for splitting the vGIC code Julien Grall
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