From: George Dunlap <george.dunlap@citrix.com>
To: Andrew Cooper <andrew.cooper3@citrix.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
xen-devel@lists.xen.org
Cc: George Dunlap <george.dunlap@eu.citrix.com>,
Dario Faggioli <dario.faggioli@citrix.com>,
jbeulich@suse.com, sherry.hurwitz@amd.com,
boris.ostrovsky@oracle.com
Subject: Re: [PATCH v2 08/10] x86/SVM: Add interrupt management code via AVIC
Date: Tue, 28 Feb 2017 12:01:13 +0000 [thread overview]
Message-ID: <3bd95554-bd36-72c3-a58b-d07a8f53b09e@citrix.com> (raw)
In-Reply-To: <53a73d63-efca-d6bd-bbfe-090147d85ce8@citrix.com>
On 02/01/17 17:45, Andrew Cooper wrote:
> On 31/12/2016 05:45, Suravee Suthikulpanit wrote:
>> Enabling AVIC implicitly disables the V_IRQ, V_INTR_PRIO, V_IGN_TPR,
>> and V_INTR_VECTOR fields in the VMCB Control Word. Therefore, this patch
>> introduces new interrupt injection code via AVIC backing page.
>>
>> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
>> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
>> Cc: Jan Beulich <JBeulich@suse.com>
>> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
>> ---
>> xen/arch/x86/hvm/svm/avic.c | 28 ++++++++++++++++++++++++++++
>> xen/arch/x86/hvm/svm/intr.c | 4 ++++
>> xen/arch/x86/hvm/svm/svm.c | 12 ++++++++++--
>> xen/include/asm-x86/hvm/svm/avic.h | 1 +
>> 4 files changed, 43 insertions(+), 2 deletions(-)
>>
>> diff --git a/xen/arch/x86/hvm/svm/avic.c b/xen/arch/x86/hvm/svm/avic.c
>> index 6351c8e..faa5e45 100644
>> --- a/xen/arch/x86/hvm/svm/avic.c
>> +++ b/xen/arch/x86/hvm/svm/avic.c
>> @@ -636,6 +636,34 @@ void svm_avic_vmexit_do_noaccel(struct cpu_user_regs *regs)
>> return;
>> }
>>
>> +void svm_avic_deliver_posted_intr(struct vcpu *v, u8 vec)
>> +{
>> + struct vlapic *vlapic = vcpu_vlapic(v);
>> +
>> + /* Fallback to use non-AVIC if vcpu is not enabled with AVIC. */
>> + if ( !svm_avic_vcpu_enabled(v) )
>> + {
>> + if ( !vlapic_test_and_set_vector(vec, &vlapic->regs->data[APIC_IRR]) )
>> + vcpu_kick(v);
>> + return;
>> + }
>> +
>> + if ( !(guest_cpu_user_regs()->eflags & X86_EFLAGS_IF) )
>> + return;
>
> Won't this discard the interrupt?
>
>> +
>> + if ( vlapic_test_and_set_vector(vec, &vlapic->regs->data[APIC_IRR]) )
>> + return;
>> +
>> + /*
>> + * If vcpu is running on another cpu, hit the doorbell to signal
>> + * it to process interrupt. Otherwise, kick it.
>> + */
>> + if ( v->is_running && (v != current) )
>> + wrmsrl(AVIC_DOORBELL, cpu_data[v->processor].apicid);
>
> Hmm - my gut feeling is that this is racy without holding the scheduler
> lock for the target pcpu. Nothing (I am aware of) excludes ->is_running
> and ->processor changing behind our back.
>
> CC'ing George and Dario for their input.
I'm not sure how AVIC_DOORBELL works (haven't looked at the whole
series) -- the vcpu_kick() path accesses both is_running and
v->processor without locks; but that's because any schedule event which
may change those values will also check to see whether there is a
pending event to be delivered. In theory the same could apply to this
mechanism, but it would take some careful thinking (in particular,
understanding the "NB's" in vcpu_kick() to see if and how they apply).
-George
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next prev parent reply other threads:[~2017-02-28 12:01 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-31 5:45 [PATCH v2 00/10] Introduce AMD SVM AVIC Suravee Suthikulpanit
2016-12-31 5:45 ` [PATCH v2 01/10] x86/HVM: Introduce struct hvm_pi_ops Suravee Suthikulpanit
2017-01-05 2:54 ` Tian, Kevin
2017-01-05 7:57 ` Jan Beulich
2017-01-05 15:51 ` Jan Beulich
2017-01-10 6:51 ` Suravee Suthikulpanit
2017-01-10 8:24 ` Jan Beulich
2017-01-10 9:45 ` Suravee Suthikulpanit
2016-12-31 5:45 ` [PATCH v2 02/10] x86/vLAPIC: Declare vlapic_read_aligned() and vlapic_reg_write() as non-static Suravee Suthikulpanit
2017-01-05 15:53 ` Jan Beulich
2017-01-10 6:57 ` Suravee Suthikulpanit
2017-01-10 8:25 ` Jan Beulich
2016-12-31 5:45 ` [PATCH v2 03/10] x86/HVM: Call vlapic_destroy after vcpu_destroy Suravee Suthikulpanit
2017-01-05 2:56 ` Tian, Kevin
2017-01-05 15:56 ` Jan Beulich
2017-01-10 8:18 ` Suravee Suthikulpanit
2016-12-31 5:45 ` [PATCH v2 04/10] x86/SVM: Modify VMCB fields to add AVIC support Suravee Suthikulpanit
2016-12-31 5:45 ` [PATCH v2 05/10] x86/HVM/SVM: Add AVIC initialization code Suravee Suthikulpanit
2017-01-02 16:37 ` Andrew Cooper
2017-01-04 17:24 ` Suravee Suthikulpanit
2017-01-04 17:59 ` Andrew Cooper
2017-01-10 3:06 ` Suravee Suthikulpanit
2017-01-03 14:54 ` Boris Ostrovsky
2016-12-31 5:45 ` [PATCH v2 06/10] x86/SVM: Add AVIC vmexit handlers Suravee Suthikulpanit
2017-01-02 17:28 ` Andrew Cooper
2017-01-05 4:07 ` Suravee Suthikulpanit
2017-01-03 15:34 ` Boris Ostrovsky
2017-01-05 6:41 ` Suravee Suthikulpanit
2016-12-31 5:45 ` [PATCH v2 07/10] x86/SVM: Add vcpu scheduling support for AVIC Suravee Suthikulpanit
2017-01-02 17:35 ` Andrew Cooper
2017-01-03 15:43 ` Boris Ostrovsky
2016-12-31 5:45 ` [PATCH v2 08/10] x86/SVM: Add interrupt management code via AVIC Suravee Suthikulpanit
2017-01-02 17:45 ` Andrew Cooper
2017-02-28 12:01 ` George Dunlap [this message]
2017-01-05 16:01 ` Jan Beulich
2016-12-31 5:46 ` [PATCH v2 09/10] x86/SVM: Hook up miscellaneous AVIC functions Suravee Suthikulpanit
2017-01-02 17:49 ` Andrew Cooper
2017-01-05 16:05 ` Jan Beulich
2017-01-10 8:35 ` Suravee Suthikulpanit
2017-01-10 9:00 ` Jan Beulich
2017-01-10 10:28 ` Suravee Suthikulpanit
2016-12-31 5:46 ` [PATCH v2 10/10] x86/SVM: Add AMD AVIC key handler Suravee Suthikulpanit
2017-01-03 16:01 ` Boris Ostrovsky
2017-01-03 16:04 ` Andrew Cooper
2017-01-05 8:00 ` Suravee Suthikulpanit
2017-01-05 16:07 ` Jan Beulich
2017-01-10 11:14 ` Suravee Suthikulpanit
2017-01-10 12:55 ` Jan Beulich
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