From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Kevin Tian <kevin.tian@intel.com>,
Jun Nakajima <jun.nakajima@intel.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>,
Xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH 4/6] x86/hvm: Move hvm_funcs.cpuid_intercept() handling into hvm_cpuid()
Date: Wed, 16 Nov 2016 17:07:58 +0000 [thread overview]
Message-ID: <3daf6e0c-61b0-413b-911d-818a51a81a43@citrix.com> (raw)
In-Reply-To: <582C875C020000780011F445@prv-mh.provo.novell.com>
On 16/11/16 15:20, Jan Beulich wrote:
>>>> On 16.11.16 at 13:31, <andrew.cooper3@citrix.com> wrote:
>> @@ -3676,6 +3671,12 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx,
>> if ( !(hvm_pae_enabled(v) || hvm_long_mode_enabled(v)) )
>> *edx &= ~cpufeat_mask(X86_FEATURE_PSE36);
>> }
>> +
>> + /* SYSCALL is hidden outside of long mode on Intel. */
>> + if ( d->arch.x86_vendor == X86_VENDOR_INTEL &&
>> + !hvm_long_mode_enabled(v))
>> + *edx &= ~cpufeat_mask(X86_FEATURE_SYSCALL);
> Original code also set the bit in its opposite path - don't you think
> this should be retained (or otherwise the change be explained in
> the description)?
Yeah - that was conceptually wrong. It is legitimate (although
unlikely) for an admin to explicitly configure the VM to hide syscall
even in long mode, as they have distinct feature bits.
In reality however, SYSCALL already set in edx by this point. I will
update the commit message.
>
>> @@ -3700,6 +3701,14 @@ void hvm_cpuid(unsigned int input, unsigned int *eax, unsigned int *ebx,
>>
>> *ebx &= hvm_featureset[FEATURESET_e8b];
>> break;
>> +
>> + case 0x8000001c:
>> + if ( !(v->arch.xcr0 & XSTATE_LWP) )
>> + *eax = 0;
>> + else if ( cpu_has_svm && cpu_has_lwp )
>> + /* Turn on available bit and other features specified in lwp_cfg. */
>> + *eax = (*edx & v->arch.hvm_svm.guest_lwp_cfg) | 1;
>> + break;
> Wouldn't it be better to do
>
> + if ( cpu_has_svm && cpu_has_lwp && (v->arch.xcr0 & XSTATE_LWP) )
> + /* Turn on available bit and other features specified in lwp_cfg. */
> + *eax = (*edx & v->arch.hvm_svm.guest_lwp_cfg) | 1;
> + else
> + *eax = 0;
>
> the more that you're (slightly) altering original behavior anyway?
That would be slightly better.
~Andrew
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next prev parent reply other threads:[~2016-11-16 17:07 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-16 12:31 [PATCH for-4.9 0/6] Introductory cleanup for CPUID phase 2 work Andrew Cooper
2016-11-16 12:31 ` [PATCH 1/6] xen/x86: Add a helper to calculate family/model/stepping information Andrew Cooper
2016-11-16 12:49 ` Jan Beulich
2016-11-16 12:50 ` Andrew Cooper
2016-11-16 12:31 ` [PATCH 2/6] x86/vpmu: Move vpmu_do_cpuid() handling into {pv, hvm}_cpuid() Andrew Cooper
2016-11-16 12:53 ` Jan Beulich
2016-11-16 13:01 ` Andrew Cooper
2016-11-16 13:34 ` Jan Beulich
2016-11-17 5:21 ` Tian, Kevin
2016-11-17 10:52 ` Jan Beulich
2016-11-16 12:31 ` [PATCH 3/6] x86/vpmu: Remove core2_no_vpmu_ops Andrew Cooper
2016-11-16 13:09 ` Jan Beulich
2016-11-16 16:27 ` Boris Ostrovsky
2016-11-16 17:04 ` Andrew Cooper
2016-11-16 17:09 ` Boris Ostrovsky
2016-11-16 17:08 ` Andrew Cooper
2016-11-17 5:29 ` Tian, Kevin
2016-11-16 12:31 ` [PATCH 4/6] x86/hvm: Move hvm_funcs.cpuid_intercept() handling into hvm_cpuid() Andrew Cooper
2016-11-16 15:20 ` Jan Beulich
2016-11-16 17:07 ` Andrew Cooper [this message]
2016-11-17 10:54 ` Jan Beulich
2016-11-16 16:40 ` Boris Ostrovsky
2016-11-16 17:10 ` Andrew Cooper
2016-11-16 17:34 ` Boris Ostrovsky
2016-11-16 17:34 ` Andrew Cooper
2016-11-16 17:45 ` Boris Ostrovsky
2016-11-17 5:41 ` Tian, Kevin
2016-11-16 12:31 ` [PATCH 5/6] x86/time: Move cpuid_time_leaf() handling into cpuid_hypervisor_leaves() Andrew Cooper
2016-11-16 15:47 ` Jan Beulich
2016-11-16 12:31 ` [PATCH 6/6] x86/hvm: Move hvm_hypervisor_cpuid_leaf() " Andrew Cooper
2016-11-16 15:53 ` Jan Beulich
2016-11-16 17:11 ` Andrew Cooper
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