From: Julien Grall <julien.grall@arm.com>
To: Andre Przywara <andre.przywara@arm.com>,
Stefano Stabellini <sstabellini@kernel.org>
Cc: xen-devel@lists.xenproject.org,
Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>,
Vijay Kilari <vijay.kilari@gmail.com>,
Shanker Donthineni <shankerd@codeaurora.org>
Subject: Re: [PATCH v8 01/27] ARM: GICv3: propagate number of host LPIs to GICv3 guest
Date: Wed, 12 Apr 2017 11:06:01 +0100 [thread overview]
Message-ID: <41565df1-af13-f66a-ad67-b015f6fcbcc2@arm.com> (raw)
In-Reply-To: <1491957874-31600-2-git-send-email-andre.przywara@arm.com>
Hi Andre,
On 12/04/17 01:44, Andre Przywara wrote:
> The host supports a certain number of LPI identifiers, as stored in
> the GICD_TYPER register.
> Store this number from the hardware register in vgic_v3_hw to allow
> injecting the very same number into a guest (Dom0).
DOM0 number should be derived from the limitation provided by the user
(i.e lpi_data.max_host_lpi_ids) and not directly from the hardware.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> xen/arch/arm/gic-v3.c | 6 +++++-
> xen/arch/arm/vgic-v3.c | 7 ++++++-
> xen/include/asm-arm/domain.h | 1 +
> xen/include/asm-arm/vgic.h | 3 ++-
> 4 files changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c
> index a559e5e..29c8964 100644
> --- a/xen/arch/arm/gic-v3.c
> +++ b/xen/arch/arm/gic-v3.c
> @@ -1579,6 +1579,7 @@ static int __init gicv3_init(void)
> {
> int res, i;
> uint32_t reg;
> + unsigned int intid_bits;
>
> if ( !cpu_has_gicv3 )
> {
> @@ -1622,8 +1623,11 @@ static int __init gicv3_init(void)
> i, r->base, r->base + r->size);
> }
>
> + reg = readl_relaxed(GICD + GICD_TYPER);
> + intid_bits = GICD_TYPE_ID_BITS(reg);
> +
> vgic_v3_setup_hw(dbase, gicv3.rdist_count, gicv3.rdist_regions,
> - gicv3.rdist_stride);
> + gicv3.rdist_stride, intid_bits);
This only works for DOM0, I would expect the number of the guest to come
up from the toolstack. You may want to have a look to
xen_arch_domain_config. This is not necessary for this version (*hint*
this should be listed in the list of TODO in the cover letter *hint*).
> gicv3_init_v2();
>
> spin_lock_init(&gicv3.lock);
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index d10757a..ebcca22 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -57,18 +57,21 @@ static struct {
> unsigned int nr_rdist_regions;
> const struct rdist_region *regions;
> uint32_t rdist_stride; /* Re-distributor stride */
> + unsigned int intid_bits; /* Number of interrupt ID bits */
> } vgic_v3_hw;
>
> void vgic_v3_setup_hw(paddr_t dbase,
> unsigned int nr_rdist_regions,
> const struct rdist_region *regions,
> - uint32_t rdist_stride)
> + uint32_t rdist_stride,
> + unsigned int intid_bits)
> {
> vgic_v3_hw.enabled = 1;
> vgic_v3_hw.dbase = dbase;
> vgic_v3_hw.nr_rdist_regions = nr_rdist_regions;
> vgic_v3_hw.regions = regions;
> vgic_v3_hw.rdist_stride = rdist_stride;
> + vgic_v3_hw.intid_bits = intid_bits;
> }
>
> static struct vcpu *vgic_v3_irouter_to_vcpu(struct domain *d, uint64_t irouter)
> @@ -1482,6 +1485,8 @@ static int vgic_v3_domain_init(struct domain *d)
>
> first_cpu += size / d->arch.vgic.rdist_stride;
> }
> +
> + d->arch.vgic.intid_bits = vgic_v3_hw.intid_bits;
So intid_bits is based on what the hardware report, however Xen may not
use ITS. So I would have expected this number to be derived from what is
actually exposed to the domain. For DOM0 it would be the number of LPIs
supported in Xen (e.g lpi_data.max_host_lpi_ids) if ITS is enabled.
Looking at the code (patch #12), you are only using intid_bits when ITS
is enabled which is really surprising as this value should be correct
even though LPIs are not used by DOM0.
> }
> else
> {
> diff --git a/xen/include/asm-arm/domain.h b/xen/include/asm-arm/domain.h
> index 6de8082..7c3829d 100644
> --- a/xen/include/asm-arm/domain.h
> +++ b/xen/include/asm-arm/domain.h
> @@ -111,6 +111,7 @@ struct arch_domain
> uint32_t rdist_stride; /* Re-Distributor stride */
> struct rb_root its_devices; /* Devices mapped to an ITS */
> spinlock_t its_devices_lock; /* Protects the its_devices tree */
> + unsigned int intid_bits;
> #endif
> } vgic;
>
> diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
> index 544867a..df75064 100644
> --- a/xen/include/asm-arm/vgic.h
> +++ b/xen/include/asm-arm/vgic.h
> @@ -346,7 +346,8 @@ struct rdist_region;
> void vgic_v3_setup_hw(paddr_t dbase,
> unsigned int nr_rdist_regions,
> const struct rdist_region *regions,
> - uint32_t rdist_stride);
> + uint32_t rdist_stride,
> + unsigned int intid_bits);
> #endif
>
> #endif /* __ASM_ARM_VGIC_H__ */
>
Cheers,
--
Julien Grall
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next prev parent reply other threads:[~2017-04-12 10:06 UTC|newest]
Thread overview: 82+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-12 0:44 [PATCH v8 00/27] arm64: Dom0 ITS emulation Andre Przywara
2017-04-12 0:44 ` [PATCH v8 01/27] ARM: GICv3: propagate number of host LPIs to GICv3 guest Andre Przywara
2017-04-12 10:06 ` Julien Grall [this message]
2017-04-12 0:44 ` [PATCH v8 02/27] ARM: VGIC: move irq_to_pending() calls under the VGIC VCPU lock Andre Przywara
2017-04-12 10:13 ` Julien Grall
2017-04-12 11:38 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 03/27] ARM: GIC: Add checks for NULL pointer pending_irq's Andre Przywara
2017-04-12 10:25 ` Julien Grall
2017-04-12 14:51 ` Andre Przywara
2017-04-12 14:52 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 04/27] ARM: GICv3: introduce separate pending_irq structs for LPIs Andre Przywara
2017-04-12 10:35 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 05/27] ARM: GICv3: forward pending LPIs to guests Andre Przywara
2017-04-12 10:44 ` Julien Grall
2017-04-12 17:26 ` Andre Przywara
2017-05-10 10:47 ` Andre Przywara
2017-05-10 11:07 ` Julien Grall
2017-05-10 17:14 ` Andre Przywara
2017-05-10 17:17 ` Julien Grall
2017-05-11 17:55 ` Andre Przywara
2017-04-12 0:44 ` [PATCH v8 06/27] ARM: GICv3: enable ITS and LPIs on the host Andre Przywara
2017-04-12 0:44 ` [PATCH v8 07/27] ARM: vGICv3: handle virtual LPI pending and property tables Andre Przywara
2017-04-12 10:55 ` Julien Grall
2017-04-12 13:12 ` Andre Przywara
2017-04-12 13:13 ` Julien Grall
2017-05-11 17:54 ` Andre Przywara
2017-04-12 0:44 ` [PATCH v8 08/27] ARM: introduce vgic_access_guest_memory() Andre Przywara
2017-04-12 12:29 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 09/27] ARM: vGICv3: re-use vgic_reg64_check_access Andre Przywara
2017-04-12 0:44 ` [PATCH v8 10/27] ARM: GIC: export vgic_init_pending_irq() Andre Przywara
2017-04-12 0:44 ` [PATCH v8 11/27] ARM: VGIC: add vcpu_id to struct pending_irq Andre Przywara
2017-04-12 12:32 ` Julien Grall
2017-04-12 12:37 ` Andre Przywara
2017-04-12 0:44 ` [PATCH v8 12/27] ARM: vGIC: advertise LPI support Andre Przywara
2017-04-12 12:38 ` Julien Grall
2017-04-12 12:48 ` Andre Przywara
2017-04-12 13:04 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 13/27] ARM: vITS: add command handling stub and MMIO emulation Andre Przywara
2017-04-12 12:59 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 14/27] ARM: vITS: introduce translation table walks Andre Przywara
2017-04-12 13:22 ` Julien Grall
2017-04-12 13:36 ` Andre Przywara
2017-04-12 13:37 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 15/27] ARM: vITS: handle CLEAR command Andre Przywara
2017-04-12 14:10 ` Julien Grall
2017-04-12 14:29 ` Andre Przywara
2017-04-12 14:49 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 16/27] ARM: vITS: handle INT command Andre Przywara
2017-04-12 14:50 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 17/27] ARM: vITS: handle MAPC command Andre Przywara
2017-04-12 14:51 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 18/27] ARM: vITS: handle MAPD command Andre Przywara
2017-04-12 15:21 ` Julien Grall
2017-04-12 17:03 ` Andre Przywara
2017-04-12 17:05 ` Julien Grall
2017-04-12 17:24 ` Andrew Cooper
2017-04-12 18:18 ` Wei Liu
2017-05-10 10:42 ` Andre Przywara
2017-05-10 11:30 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 19/27] ARM: vITS: handle MAPTI command Andre Przywara
2017-04-12 16:18 ` Julien Grall
2017-04-12 16:27 ` Andre Przywara
2017-04-12 17:16 ` Julien Grall
2017-04-12 17:25 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 20/27] ARM: GICv3: handle unmapped LPIs Andre Przywara
2017-04-12 9:46 ` Andre Przywara
2017-04-12 16:49 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 21/27] ARM: vITS: handle MOVI command Andre Przywara
2017-04-12 16:59 ` Julien Grall
2017-05-10 10:34 ` Andre Przywara
2017-04-12 0:44 ` [PATCH v8 22/27] ARM: vITS: handle DISCARD command Andre Przywara
2017-04-12 17:06 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 23/27] ARM: vITS: handle INV command Andre Przywara
2017-04-12 17:20 ` Julien Grall
2017-05-10 15:11 ` Andre Przywara
2017-05-11 10:43 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 24/27] ARM: vITS: handle INVALL command Andre Przywara
2017-04-12 17:26 ` Julien Grall
2017-04-12 0:44 ` [PATCH v8 25/27] ARM: vITS: increase mmio_count for each ITS Andre Przywara
2017-04-12 0:44 ` [PATCH v8 26/27] ARM: vITS: create and initialize virtual ITSes for Dom0 Andre Przywara
2017-04-12 0:44 ` [PATCH v8 27/27] ARM: vITS: create ITS subnodes for Dom0 DT Andre Przywara
2017-04-12 14:13 ` [PATCH v8 00/27] arm64: Dom0 ITS emulation Julien Grall
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