From mboxrd@z Thu Jan  1 00:00:00 1970
From: Weidong Han <weidong.han@intel.com>
Subject: Re: [PATCH 1/3] VT-d: support Intel IGD passthrough
Date: Fri, 05 Feb 2010 09:52:47 +0800
Message-ID: <4B6B79EF.2070609@intel.com>
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To: Ian Jackson <Ian.Jackson@eu.citrix.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>, "Kay,
	Allen M" <allen.m.kay@intel.com>, Keir Fraser <keir.fraser@eu.citrix.com>
List-Id: xen-devel@lists.xenproject.org

Ian Jackson wrote:
> Han, Weidong writes ("[Xen-devel][PATCH 1/3] VT-d: support Intel IGD passthrough "):
>   
>> Some registers of Intel IGD are mapped in host bridge, so it needs
>> to passthrough these registers of physical host bridge to guest
>> because emulated host bridge in guest doesn't have these mappings.
>>
>> Some VBIOSs and drivers ssume the IGD BDF (bus:device:function) is
>> always 00:02.0, so this patch reserves 00:02.0 for assigned IGD in
>> guest.
>>     
>
> Thanks for the contribution, which I have applied with a very small
> change to avoid having an open else at #endif.
>
> However the part in pci.c is really very ugly indeed.  If we ever get
> around to rebasing to recent upstream qemu and trying to upstream our
> patches, this is sure to be dropped.  So you might profitably spend
> some time thinking how to make it less ugly.
>
> Thanks,
> Ian.
>   

Thanks for check-in.  I agree the hacking in pci.c is not elegant. We 
will think how to make it cleaner.

Regards,
Weidong


>   
>> +#ifdef CONFIG_PASSTHROUGH
>> +    /* host bridge reads for IGD passthrough */
>> +    if ( igd_passthru && pci_dev->devfn == 0x00 )
>> +    {
>> +        val = pci_dev->config_read(pci_dev, config_addr, len);
>> +
>> +        if ( config_addr == 0x00 && len == 4 )
>> +            val = pt_pci_host_read_long(0, 0, 0, 0x00);
>> +        else if ( config_addr == 0x02 ) // Device ID
>> +            val = pt_pci_host_read_word(0, 0, 0, 0x02);
>> +        else if ( config_addr == 0x52 ) // GMCH Graphics Control Register
>> +            val = pt_pci_host_read_word(0, 0, 0, 0x52);
>> +        else if ( config_addr == 0xa0 ) // GMCH Top of Memory Register
>> +            val = pt_pci_host_read_word(0, 0, 0, 0xa0);
>> +    }
>> +    else if ( igd_passthru && pci_dev->devfn == 0x10 &&
>> +              config_addr == 0xfc ) // read on IGD device
>> +        val = 0;  // use SMI to communicate with the system BIOS
>> +    else
>> +#endif
>> +        val = pci_dev->config_read(pci_dev, config_addr, len);
>> +
>>