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From: "Jan Beulich" <JBeulich@novell.com>
To: Wei Huang <wei.huang2@amd.com>
Cc: joerg.roedel@amd.com, Christoph Egger <Christoph.Egger@amd.com>,
	xen-devel@lists.xensource.com,
	Keir Fraser <keir.fraser@eu.citrix.com>
Subject: Re: [PATCH] Fix for AMD erratum 383 on Family 10h CPUs
Date: Wed, 19 May 2010 12:55:16 +0100	[thread overview]
Message-ID: <4BF3EDC4020000780000330F@vpn.id2.novell.com> (raw)
In-Reply-To: <4BF19195.1080907@amd.com>

>>> Wei Huang <wei.huang2@amd.com> 17.05.10 20:57 >>>
>This patches implements the workaround of AMD erratum 383 on family 10h 
>CPUs. It destroys the guest VM when a MC error with a special pattern is 
>detected. Without this patch, a guest VM failure can potentially crash 
>Xen hypervisor and the whole system. The erratum will be published in 
>next version of guide.

While I realize that the patch has already been applied, I still have
some reservations:
- It fiddles with bit 47 of MSR_AMD64_DC_CFG *and* marks that the
  erratum is present. Normally I would expect that MSR modifications
  are done to work around an erratum, but here it is completely
  unclear what the modification is good for.
- It clears all MCi_STATUS registers, despite (as I understand it) the
  problem only involving bank 0.
- It flushes the TLBs for the affected domain - shouldn't this be done
  globally, if it is necessary at all?
- Is it guaranteed that the #MC cannot happen when a #VMEXIT is
  already being processed by the CPU?

Jan

      reply	other threads:[~2010-05-19 11:55 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-05-17 18:57 [PATCH] Fix for AMD erratum 383 on Family 10h CPUs Wei Huang
2010-05-19 11:55 ` Jan Beulich [this message]

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