From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: [PATCH 2/3] x86: allow the MSI-X table to reside beyond 4G even on 32-bit systems Date: Mon, 12 Jul 2010 10:37:31 +0100 Message-ID: <4C3AFE7B020000780000AB53@vpn.id2.novell.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="=__PartB79ACC4B.0__=" Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: "xen-devel@lists.xensource.com" List-Id: xen-devel@lists.xenproject.org This is a MIME message. If you are reading this text, you may want to consider changing to a mail reader or gateway that understands how to properly handle MIME multipart messages. --=__PartB79ACC4B.0__= Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Content-Disposition: inline Underlying interfaces allow this, and unduly (and silently) truncating addresses doesn't seem nice. Signed-off-by: Jan Beulich --- 2010-06-15.orig/xen/arch/x86/msi.c 2010-07-09 14:49:25.000000000 = +0200 +++ 2010-06-15/xen/arch/x86/msi.c 2010-07-09 15:14:43.000000000 = +0200 @@ -57,10 +57,11 @@ static void msix_fixmap_free(int idx) spin_unlock(&msix_fixmap_lock); } =20 -static int msix_get_fixmap(struct pci_dev *dev, unsigned long table_paddr,= - unsigned long entry_paddr) +static int msix_get_fixmap(struct pci_dev *dev, u64 table_paddr, + u64 entry_paddr) { - int nr_page, idx; + long nr_page; + int idx; =20 nr_page =3D (entry_paddr >> PAGE_SHIFT) - (table_paddr >> PAGE_SHIFT);= =20 @@ -536,7 +537,7 @@ static int msix_capability_init(struct p struct msi_desc *entry; int pos; u16 control; - unsigned long table_paddr, entry_paddr; + u64 table_paddr, entry_paddr; u32 table_offset, entry_offset; u8 bir; void __iomem *base; @@ -571,7 +572,8 @@ static int msix_capability_init(struct p xfree(entry); return idx; } - base =3D (void *)(fix_to_virt(idx) + (entry_paddr & ((1UL << = PAGE_SHIFT) - 1))); + base =3D (void *)(fix_to_virt(idx) + + ((unsigned long)entry_paddr & ((1UL << PAGE_SHIFT) - 1))); =20 entry->msi_attrib.type =3D PCI_CAP_ID_MSIX; entry->msi_attrib.is_64 =3D 1; --=__PartB79ACC4B.0__= Content-Type: text/plain; name="x86-msix-table-64bit.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="x86-msix-table-64bit.patch" Underlying interfaces allow this, and unduly (and silently) truncating=0Aad= dresses doesn't seem nice.=0A=0ASigned-off-by: Jan Beulich =0A=0A--- 2010-06-15.orig/xen/arch/x86/msi.c 2010-07-09 = 14:49:25.000000000 +0200=0A+++ 2010-06-15/xen/arch/x86/msi.c 2010-07-09 = 15:14:43.000000000 +0200=0A@@ -57,10 +57,11 @@ static void msix_fixmap_free= (int idx)=0A spin_unlock(&msix_fixmap_lock);=0A }=0A =0A-static int = msix_get_fixmap(struct pci_dev *dev, unsigned long table_paddr,=0A- = unsigned long entry_paddr)=0A+static int msix_get_fixmap= (struct pci_dev *dev, u64 table_paddr,=0A+ u64 = entry_paddr)=0A {=0A- int nr_page, idx;=0A+ long nr_page;=0A+ int = idx;=0A =0A nr_page =3D (entry_paddr >> PAGE_SHIFT) - (table_paddr >> = PAGE_SHIFT);=0A =0A@@ -536,7 +537,7 @@ static int msix_capability_init(stru= ct p=0A struct msi_desc *entry;=0A int pos;=0A u16 control;=0A-= unsigned long table_paddr, entry_paddr;=0A+ u64 table_paddr, = entry_paddr;=0A u32 table_offset, entry_offset;=0A u8 bir;=0A = void __iomem *base;=0A@@ -571,7 +572,8 @@ static int msix_capability_init(s= truct p=0A xfree(entry);=0A return idx;=0A }=0A- = base =3D (void *)(fix_to_virt(idx) + (entry_paddr & ((1UL << PAGE_SHIFT) - = 1)));=0A+ base =3D (void *)(fix_to_virt(idx) +=0A+ ((unsigned = long)entry_paddr & ((1UL << PAGE_SHIFT) - 1)));=0A =0A entry->msi_attri= b.type =3D PCI_CAP_ID_MSIX;=0A entry->msi_attrib.is_64 =3D 1;=0A --=__PartB79ACC4B.0__= Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel --=__PartB79ACC4B.0__=--