* [Q] guest and user protection on x86-64 by paging
@ 2010-08-01 16:01 Min Lee
2010-08-02 6:31 ` Jeremy Fitzhardinge
0 siblings, 1 reply; 3+ messages in thread
From: Min Lee @ 2010-08-01 16:01 UTC (permalink / raw)
To: Xen-devel
Hi, folks.
one question. I'll read source code, but if one can give me brief overview,
it would be so helpful. On x86-64, guest and user runs both in ring 3, and
protect from each other by paging mechanism. but, how? Then page table
should be modified and TLB would be flushed for every system call. This
would be some overhead, I think. Is this what Xen is doing? If not, how
paging mechanism protect guest from its application?
Thanks
Min
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Q] guest and user protection on x86-64 by paging
2010-08-01 16:01 [Q] guest and user protection on x86-64 by paging Min Lee
@ 2010-08-02 6:31 ` Jeremy Fitzhardinge
2010-08-02 14:35 ` Min Lee
0 siblings, 1 reply; 3+ messages in thread
From: Jeremy Fitzhardinge @ 2010-08-02 6:31 UTC (permalink / raw)
To: Min Lee; +Cc: Xen-devel
On 08/01/2010 09:01 AM, Min Lee wrote:
> Hi, folks.
> one question. I'll read source code, but if one can give me brief
> overview, it would be so helpful. On x86-64, guest and user runs both
> in ring 3, and protect from each other by paging mechanism. but, how?
> Then page table should be modified and TLB would be flushed for every
> system call. This would be some overhead, I think. Is this what Xen is
> doing?
Yes it is. 64-bit PV guests run at a considerable disadvantage. The
only mitigating factor is that it sets the Global bit on usermode ptes,
so that they don't get flushed from tlb during the transition.
J
^ permalink raw reply [flat|nested] 3+ messages in thread* Re: [Q] guest and user protection on x86-64 by paging
2010-08-02 6:31 ` Jeremy Fitzhardinge
@ 2010-08-02 14:35 ` Min Lee
0 siblings, 0 replies; 3+ messages in thread
From: Min Lee @ 2010-08-02 14:35 UTC (permalink / raw)
To: Xen-devel
I see..
Thanks for your help, Jeremy.
Min
On 8/2/2010 2:31 AM, Jeremy Fitzhardinge wrote:
> On 08/01/2010 09:01 AM, Min Lee wrote:
>> Hi, folks.
>> one question. I'll read source code, but if one can give me brief
>> overview, it would be so helpful. On x86-64, guest and user runs both in
>> ring 3, and protect from each other by paging mechanism. but, how? Then
>> page table should be modified and TLB would be flushed for every system
>> call. This would be some overhead, I think. Is this what Xen is doing?
>
> Yes it is. 64-bit PV guests run at a considerable disadvantage. The only
> mitigating factor is that it sets the Global bit on usermode ptes, so that
> they don't get flushed from tlb during the transition.
>
> J
>
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2010-08-02 14:35 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2010-08-01 16:01 [Q] guest and user protection on x86-64 by paging Min Lee
2010-08-02 6:31 ` Jeremy Fitzhardinge
2010-08-02 14:35 ` Min Lee
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).