From mboxrd@z Thu Jan 1 00:00:00 1970 From: Min Lee Subject: Re: [Q] guest and user protection on x86-64 by paging Date: Mon, 02 Aug 2010 10:35:18 -0400 Message-ID: <4C56D7A6.1030600@gatech.edu> References: <4C559A4A.1030809@gatech.edu> <4C56665F.6030808@goop.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <4C56665F.6030808@goop.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org I see.. Thanks for your help, Jeremy. Min On 8/2/2010 2:31 AM, Jeremy Fitzhardinge wrote: > On 08/01/2010 09:01 AM, Min Lee wrote: >> Hi, folks. >> one question. I'll read source code, but if one can give me brief >> overview, it would be so helpful. On x86-64, guest and user runs both in >> ring 3, and protect from each other by paging mechanism. but, how? Then >> page table should be modified and TLB would be flushed for every system >> call. This would be some overhead, I think. Is this what Xen is doing? > > Yes it is. 64-bit PV guests run at a considerable disadvantage. The only > mitigating factor is that it sets the Global bit on usermode ptes, so that > they don't get flushed from tlb during the transition. > > J >