[PATCH] libxc: remove CPUID core information mangling

[Andre Przywara <andre.przywara@amd.com>]

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Hi,

c/s 18560:782599274bf9ae8857c55856c9c7fdf082967808 introduced CPUID 
mangling resulting in a doubled number of cores/processor exposed to the 
guest. According to comments in this patch the rationale behind this is 
to match the APIC numbering used by Xen.
In my understanding the CPUID leafs dealing with number of cores always 
talk about logical numbers and not APIC IDs. So we don't need to adjust 
the CPUID readout to match the APIC ID enumeration scheme.
If there were any serious reasons resulting in the old patch I'd love to 
hear them.

The attached patch fixes this and solves an issue I saw with certain 
NUMA guest configurations.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>

-- 
Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany
Tel: +49 351 448-3567-12

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diff -r eccfdeb41b80 tools/libxc/xc_cpuid_x86.c
--- a/tools/libxc/xc_cpuid_x86.c	Tue Aug 24 18:42:59 2010 +0100
+++ b/tools/libxc/xc_cpuid_x86.c	Wed Aug 25 13:34:54 2010 +0200
@@ -117,9 +117,8 @@
     case 0x80000008:
         /*
          * ECX[15:12] is ApicIdCoreSize: ECX[7:0] is NumberOfCores (minus one).
-         * Update to reflect vLAPIC_ID = vCPU_ID * 2.
          */
-        regs[2] = ((regs[2] & 0xf000u) + 1) | ((regs[2] & 0xffu) << 1) | 1u;
+        regs[2] &= 0xf0ffu;
         break;
     }
 }
@@ -134,11 +133,9 @@
     case 0x00000004:
         /*
          * EAX[31:26] is Maximum Cores Per Package (minus one).
-         * Update to reflect vLAPIC_ID = vCPU_ID * 2.
          */
-        regs[0] = (((regs[0] & 0x7c000000u) << 1) | 0x04000000u |
-                   (regs[0] & 0x3ffu));
-        regs[3] &= 0x3ffu;
+        regs[0] &= 0xfc0003ffu;
+        regs[3] &= 0x00000003u;
         break;
 
     case 0x80000001: {
@@ -185,9 +182,8 @@
     case 0x00000001:
         /*
          * EBX[23:16] is Maximum Logical Processors Per Package.
-         * Update to reflect vLAPIC_ID = vCPU_ID * 2.
          */
-        regs[1] = (regs[1] & 0x0000ffffu) | ((regs[1] & 0x007f0000u) << 1);
+        regs[1] & 0x00ffffffu;
 
         regs[2] &= (bitmaskof(X86_FEATURE_XMM3) |
                     bitmaskof(X86_FEATURE_SSSE3) |

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