From: "Jan Beulich" <JBeulich@novell.com>
To: Yang Z Zhang <yang.z.zhang@intel.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>,
Weidong Han <weidong.han@intel.com>
Subject: RE: kernel panic when enable x2apic
Date: Wed, 17 Nov 2010 16:23:58 +0000 [thread overview]
Message-ID: <4CE40FAE0200007800022D71@vpn.id2.novell.com> (raw)
In-Reply-To: <749B9D3DBF0F054390025D9EAFF47F223017565C@shsmsx501.ccr.corp.intel.com>
>>> On 17.11.10 at 14:16, "Zhang, Yang Z" <yang.z.zhang@intel.com> wrote:
> In fact, there have other error info before the crash and I didn't see it
> before:
> (XEN) traps.c:2938: GPF (0000): ffff82c4801a0a73 -> ffff82c48020f0d2
> (XEN) MTRR: CPU 0: Writing MSR 200 to ffff83007f0f7670 failed
> (XEN) traps.c:2938: GPF (0000): ffff82c4801a0a73 -> ffff82c48020f0d2
> (XEN) MTRR: CPU 0: Writing MSR 201 to f00000010 failed
Hmm, these values are totally bogus (and hence it is quite clear
that the CPU would fault on them being written to the actual MSRs).
The question is where these bogus values originate, and how this is
connected to said patch (I can't see any relation between the two).
Wouldn't it be possible that you simple send the whole log?
Would you be able to do some more debugging on this to at
least narrow where things start going wrong?
Jan
next prev parent reply other threads:[~2010-11-17 16:23 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-11-17 8:59 kernel panic when enable x2apic Zhang, Yang Z
2010-11-17 9:41 ` Jan Beulich
2010-11-17 13:16 ` Zhang, Yang Z
2010-11-17 16:23 ` Jan Beulich [this message]
2010-11-18 4:53 ` Zhang, Yang Z
2010-11-19 10:17 ` Jan Beulich
2010-11-19 10:40 ` Sander Eikelenboom
2010-11-19 11:08 ` Jan Beulich
2010-11-30 0:58 ` Zhang, Yang Z
2010-11-30 8:50 ` Weidong Han
2010-11-30 9:23 ` Keir Fraser
2010-11-30 11:40 ` Keir Fraser
2010-12-01 0:42 ` Weidong Han
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