RE: [PATCH] Allow dom0 to write MSR IA32_ENERGY_PERF_BIAS

["Jan Beulich" <JBeulich@novell.com>]

>>> On 05.01.11 at 03:08, "Wei, Gang" <gang.wei@intel.com> wrote:
> Jan Beulich wrote on 2011-01-04:
>>> diff -r 4e108cf56d07 xen/arch/x86/traps.c
>>> --- a/xen/arch/x86/traps.c	Mon Dec 27 08:00:09 2010 +0000
>>> +++ b/xen/arch/x86/traps.c	Sat Jan 01 20:01:43 2011 +0800
>>> @@ -2333,6 +2333,7 @@ static int emulate_privileged_op(struct
>>>                  goto fail;
>>>              break;
>>>          case MSR_IA32_THERM_CONTROL:
>>> +        case MSR_IA32_ENERGY_PERF_BIAS:
>>>              if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
>>>                  goto fail;
>>>              if ( (v->domain->domain_id != 0) ||
>>> !v->domain->is_pinned
>>> )
>> 
>> Why would you allow this only if Dom0 has its vcpus pinned?
> 
> It is meaningless if dom0 can't control all pcpus exactly. Only in case of 
> dom0 vcpus pinned, it makes sense.

Disagree. The user mode tool could set its own affinity (virtual and
physical) and then issue the MSR write. Please don't enforce
restrictions where not really needed (I actually suppose that the
restriction should be removed for MSR_IA32_THERM_CONTROL too).

Jan