From: "Jan Beulich" <JBeulich@novell.com>
To: Keir Fraser <keir.fraser@eu.citrix.com>, Gang Wei <gang.wei@intel.com>
Cc: "xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>
Subject: Re: [PATCH] Allow dom0 to write MSR IA32_ENERGY_PERF_BIAS
Date: Wed, 05 Jan 2011 08:17:15 +0000 [thread overview]
Message-ID: <4D24371B020000780002A62B@vpn.id2.novell.com> (raw)
In-Reply-To: <C949D89C.11020%keir.fraser@eu.citrix.com>
>>> On 05.01.11 at 09:13, Keir Fraser <keir.fraser@eu.citrix.com> wrote:
> On 05/01/2011 07:59, "Jan Beulich" <JBeulich@novell.com> wrote:
>
>>>> Why would you allow this only if Dom0 has its vcpus pinned?
>>>
>>> It is meaningless if dom0 can't control all pcpus exactly. Only in case of
>>> dom0 vcpus pinned, it makes sense.
>>
>> Disagree. The user mode tool could set its own affinity (virtual and
>> physical) and then issue the MSR write. Please don't enforce
>> restrictions where not really needed (I actually suppose that the
>> restriction should be removed for MSR_IA32_THERM_CONTROL too).
>
> If so, it deserves a separate patch to strip out *all* the is_pinned checks
> at the same time.
You certainly don't mean *all*, but yes, I'm intending to submit such
a patch.
Jan
next prev parent reply other threads:[~2011-01-05 8:17 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-04 3:04 [PATCH] Allow dom0 to write MSR IA32_ENERGY_PERF_BIAS Wei, Gang
2011-01-04 9:58 ` Jan Beulich
2011-01-05 2:08 ` Wei, Gang
2011-01-05 7:59 ` Jan Beulich
2011-01-05 8:13 ` Keir Fraser
2011-01-05 8:17 ` Jan Beulich [this message]
2011-01-05 8:22 ` Keir Fraser
2011-01-05 8:31 ` Jan Beulich
2011-01-05 8:55 ` Wei, Gang
2011-01-05 9:03 ` Jan Beulich
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