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From: "Jan Beulich" <JBeulich@novell.com>
To: Keir Fraser <keir.xen@gmail.com>
Cc: Dan Magenheimer <dan.magenheimer@oracle.com>,
	"xen-devel@lists.xensource.com" <xen-devel@lists.xensource.com>,
	"winston.l.wang" <winston.l.wang@intel.com>
Subject: Re: [PATCH] x86: don't write_tsc() non-zero values on CPUs updating only the lower 32 bits
Date: Thu, 14 Apr 2011 09:06:45 +0100	[thread overview]
Message-ID: <4DA6C735020000780003B8C0@vpn.id2.novell.com> (raw)
In-Reply-To: <C9CC65DD.1654D%keir.xen@gmail.com>

>>> On 14.04.11 at 09:50, Keir Fraser <keir.xen@gmail.com> wrote:
> On 14/04/2011 08:42, "Jan Beulich" <JBeulich@novell.com> wrote:
> 
>>>>> On 14.04.11 at 09:25, Keir Fraser <keir.xen@gmail.com> wrote:
>>> On 14/04/2011 08:18, "Jan Beulich" <JBeulich@novell.com> wrote:
>>> 
>>>> This means suppressing the uses in time_calibration_tsc_rendezvous(),
>>>> cstate_restore_tsc(), and synchronize_tsc_slave(), and fixes a boot
>>>> hang of Linux Dom0 when loading processor.ko on such systems that
>>>> have support for C states above C1.
>>> 
>>> Should your new test be gated on !X86_FEATURE_TSC_RELIABLE? We already
>> 
>> Which test? The write-TSC-probe itself?
>> 
>>> *never* write the TSC when boot_cpu_has(TSC_RELIABLE) -- Dan Magenheimer
>>> made that change on the assumption that TSCs were globally synced by
>>> firmware in this case, and us writing one or more TSCs could only ever make
>>> things worse.
>> 
>> That's not true - we only avoid the writing for TSC sync during boot.
>> Post-boot bringup of CPUs will write the TSC no matter what, and
> 
> For physically-added CPUs only. Kind of unavoidable, that one: we can only
> try to do our best in that case. And let's face it, that probably affects
> exactly zero production users of Xen/x86 right now.

That latter part I agree to.

But what are you afraid of? Probing the TSC write shouldn't do any
harm. Additionally, did you read the comment immediately preceding
the probing code? AMD doesn't guarantee the TSC to be writable at
all.

>> cstate_restore_tsc() also has no such gating afaics.
> 
> It is gated on NONSTOP_TSC which is implied by TSC_RELIABLE.

Ah, yes. But (I think) not architecturally, only by virtue of how
code is currently structured. If that changes, we'd be back at a
latent (and quite non-obvious) bug.

Jan

  reply	other threads:[~2011-04-14  8:06 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-04-14  7:18 [PATCH] x86: don't write_tsc() non-zero values on CPUs updating only the lower 32 bits Jan Beulich
2011-04-14  7:25 ` Keir Fraser
2011-04-14  7:42   ` Jan Beulich
2011-04-14  7:50     ` Keir Fraser
2011-04-14  8:06       ` Jan Beulich [this message]
2011-04-14  9:18         ` Keir Fraser
2011-04-14 22:41           ` Dan Magenheimer
2011-04-15  6:40             ` Keir Fraser
2011-04-15 14:34               ` Dan Magenheimer
2011-04-15 17:28                 ` Keir Fraser
2011-04-14  7:28 ` Jan Beulich
2011-04-14 16:05 ` Keir Fraser
2011-04-14 16:28   ` Jan Beulich
2011-04-14 16:48     ` Keir Fraser
2011-04-14 18:33       ` Wang, Winston L
2011-04-14 21:06         ` Keir Fraser
2011-04-14 21:37           ` Wang, Winston L
2011-04-15  7:06           ` Jan Beulich
2011-04-15  7:08       ` Jan Beulich
2011-04-15  7:37         ` Keir Fraser
2011-04-15 14:49           ` Wang, Winston L

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