From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andre Przywara Subject: [PATCH 0/5] svm: implement new DecodeAssist feature Date: Fri, 15 Apr 2011 14:16:25 +0200 Message-ID: <4DA83719.5080106@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Keir Fraser Cc: xen-devel List-Id: xen-devel@lists.xenproject.org Hi, newer AMD SVM implementations (starting with Bulldozer) have some additions to SVM called DecodeAssist. These bits improve and simplify the handling of some intercepts, now more information is provided in the VMCB already and saves us from decoding this information "manually". These new features are described in recent editions of the APM Vol.2 manual, chapter 15.33. The first patch moves some code from VMX into HVM to be later used by SVM. The second patch adds the newly defined bits to VMCB and CPUID. Patch 3 to 5 implement three parts of the feature set, more details in the specific emails. Please comment. All patches: Signed-off-by: Andre Przywara Regards, Andre. -- Andre Przywara AMD-Operating System Research Center (OSRC), Dresden, Germany