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From: Andre Przywara <andre.przywara@amd.com>
To: Keir Fraser <keir.fraser@eu.citrix.com>
Cc: xen-devel <xen-devel@lists.xensource.com>
Subject: [PATCH 4/5] svm: implement CR access part of DecodeAssist
Date: Fri, 15 Apr 2011 14:23:25 +0200	[thread overview]
Message-ID: <4DA838BD.5040503@amd.com> (raw)
In-Reply-To: <4DA83719.5080106@amd.com>

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Newer SVM implementations (Bulldozer) now give the used general
purpose register on a MOV-CR intercept explictly. This avoids
fetching and decoding the instruction from guest's memory and speeds
up some Windows guest, which exercise CR8 quite often.

Signed-off-by: Andre Przywara <andre.przywara@amd.com>


[-- Attachment #2: da_4.patch --]
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commit 11fcadf1400313770480d6d5c4edcc1472c77b0c
Author: Andre Przywara <andre.przywara@amd.com>
Date:   Sun Jul 25 15:07:35 2010 +0200

    svm: implement CR access part of DecodeAssist
    
    Newer SVM implementations (Bulldozer) now give the used general
    purpose register on a MOV-CR intercept explictly. This avoids
    fetching and decoding the instruction from guest's memory and speeds
    up some Windows guest, which exercise CR8 quite often.
    
    Signed-off-by: Andre Przywara <andre.przywara@amd.com>

diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 861c2c7..c406bd3 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -1130,6 +1130,25 @@ static void svm_vmexit_do_cpuid(struct cpu_user_regs *regs)
     __update_guest_eip(regs, inst_len);
 }
 
+static int svm_vmexit_do_cr_access(struct vmcb_struct *vmcb,
+                                    struct cpu_user_regs *regs)
+{
+    int gp, cr, dir;
+
+    cr = vmcb->exitcode - VMEXIT_CR0_READ;
+    dir = (cr > 15);
+    cr = cr % 16;
+    gp = vmcb->exitinfo1 & 0x0F;
+
+    if (dir)
+    	hvm_mov_to_cr(gp, cr, regs);
+    else
+    	hvm_mov_from_cr(cr, gp, regs);
+
+	__update_guest_eip(regs, vmcb->nextrip - vmcb->rip);
+	return 0;
+}
+
 static void svm_dr_access(struct vcpu *v, struct cpu_user_regs *regs)
 {
     HVMTRACE_0D(DR_WRITE);
@@ -1906,9 +1925,18 @@ asmlinkage void svm_vmexit_handler(struct cpu_user_regs *regs)
                 __update_guest_eip(regs, vmcb->exitinfo2 - vmcb->rip);
             break;
         }
-        /* fallthrough to emulation if a string instruction */
+        if ( !handle_mmio() )
+            hvm_inject_exception(TRAP_gp_fault, 0, 0);
+        break;
+
     case VMEXIT_CR0_READ ... VMEXIT_CR15_READ:
     case VMEXIT_CR0_WRITE ... VMEXIT_CR15_WRITE:
+        if ((vmcb->exitinfo1 & (1ULL << 63) &&
+            svm_vmexit_do_cr_access(vmcb, regs)) ||
+            !handle_mmio() ) 
+                hvm_inject_exception(TRAP_gp_fault, 0, 0);
+        break;
+
     case VMEXIT_INVLPG:
     case VMEXIT_INVLPGA:
         if ( !handle_mmio() )

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  parent reply	other threads:[~2011-04-15 12:23 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-04-15 12:16 [PATCH 0/5] svm: implement new DecodeAssist feature Andre Przywara
2011-04-15 12:21 ` [PATCH 1/5] vmx/hvm: move mov-cr handling functions to generic HVM code Andre Przywara
2011-04-18  8:48   ` Keir Fraser
2011-04-15 12:21 ` [PATCH 2/5] svm: add bit definitions for SVM DecodeAssist Andre Przywara
2011-04-15 12:22 ` [PATCH 3/5] svm: implement instruction fetch part of DecodeAssist Andre Przywara
2011-04-18  9:10   ` Keir Fraser
2011-04-18 12:37   ` Keir Fraser
2011-04-15 12:23 ` Andre Przywara [this message]
2011-04-15 12:24 ` [PATCH 5/5] svm: implement INVLPG " Andre Przywara
2011-04-18  9:07   ` Keir Fraser

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