Re: [PATCH] FPU LWP 6/8: create lazy and non-lazy FPU restore functions

["Jan Beulich" <JBeulich@novell.com>]

>>> On 03.05.11 at 22:17, Wei Huang <wei.huang2@amd.com> wrote:

Again as pointed out earlier, ...

>--- a/xen/arch/x86/domain.c	Tue May 03 13:49:27 2011 -0500
>+++ b/xen/arch/x86/domain.c	Tue May 03 13:59:37 2011 -0500
>@@ -1578,6 +1578,7 @@
>         memcpy(stack_regs, &n->arch.user_regs, CTXT_SWITCH_STACK_BYTES);
>         if ( xsave_enabled(n) && n->arch.xcr0 != get_xcr0() )
>             set_xcr0(n->arch.xcr0);
>+        vcpu_restore_fpu_eager(n);

... this call is unconditional, ...

>         n->arch.ctxt_switch_to(n);
>     }
> 
>--- a/xen/arch/x86/i387.c	Tue May 03 13:49:27 2011 -0500
>+++ b/xen/arch/x86/i387.c	Tue May 03 13:59:37 2011 -0500
>@@ -160,10 +160,25 @@
> /*******************************/
> /*       VCPU FPU Functions    */
> /*******************************/
>+/* Restore FPU state whenever VCPU is schduled in. */
>+void vcpu_restore_fpu_eager(struct vcpu *v)
>+{
>+    ASSERT(!is_idle_vcpu(v));
>+
>+    /* Avoid recursion */
>+    clts();
>+    
>+    /* save the nonlazy extended state which is not tracked by CR0.TS bit */
>+    if ( xsave_enabled(v) )
>+        fpu_xrstor(v, XSTATE_NONLAZY);
>+
>+    stts();

... while here you do an unconditional clts followed by an xrstor only
checking whether xsave is enabled (but not checking whether there's
any non-lazy state to be restored) and, possibly the most expensive
of all, an unconditional write of CR0.

Jan

>+}
>+
> /* 
>  * Restore FPU state when #NM is triggered.
>  */
>-void vcpu_restore_fpu(struct vcpu *v)
>+void vcpu_restore_fpu_lazy(struct vcpu *v)
> {
>     ASSERT(!is_idle_vcpu(v));
>