From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: Re: [PATCH] FPU LWP 5/8: add a mask option to xsave() and xrstor() Date: Thu, 05 May 2011 08:09:24 +0100 Message-ID: <4DC26944020000780003FC33@vpn.id2.novell.com> References: <4DC062D3.9000906@amd.com> <4DC1162D020000780003F9BA@vpn.id2.novell.com> <4DC178CF.2070307@amd.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <4DC178CF.2070307@amd.com> Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Wei Huang Cc: "xen-devel@lists.xensource.com" , KeirFraser List-Id: xen-devel@lists.xenproject.org >>> On 04.05.11 at 18:03, Wei Huang wrote: > Hi Jan, >=20 > That is a good point. So far there isn't a way to decide which bits = are=20 > guarded by CR0.TS. I will bring it up to our design team. I guess LWP=20 > will the only exception for a long while. Is the first approach=20 > sufficient/acceptable to you for now? >=20 > #define XSTATE_LAZY (XSTATE_ALL & ~XSTATE_NONLAZY) Yes. Jan