From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: Re: [PATCH 2/3] xenoprof: Add support for AMD Family 15h processors Date: Thu, 05 May 2011 08:41:37 +0100 Message-ID: <4DC270D1020000780003FC66@vpn.id2.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Return-path: Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Jacob Shin Cc: xen-devel@lists.xensource.com List-Id: xen-devel@lists.xenproject.org >>> On 05.05.11 at 03:09, Jacob Shin wrote: > --- a/xen/include/asm-x86/msr-index.h Tue May 03 17:26:33 2011 -0500 > +++ b/xen/include/asm-x86/msr-index.h Wed May 04 10:56:36 2011 -0500 > @@ -223,6 +223,19 @@ > #define MSR_K8_ENABLE_C1E 0xc0010055 > #define MSR_K8_VM_CR 0xc0010114 > #define MSR_K8_VM_HSAVE_PA 0xc0010117 > + > +#define MSR_FAM15H_EVNTSEL0 0xc0010200 > +#define MSR_FAM15H_PERFCTR0 0xc0010201 > +#define MSR_FAM15H_EVNTSEL1 0xc0010202 > +#define MSR_FAM15H_PERFCTR1 0xc0010203 > +#define MSR_FAM15H_EVNTSEL2 0xc0010204 > +#define MSR_FAM15H_PERFCTR2 0xc0010205 > +#define MSR_FAM15H_EVNTSEL3 0xc0010206 > +#define MSR_FAM15H_PERFCTR3 0xc0010207 > +#define MSR_FAM15H_EVNTSEL4 0xc0010208 > +#define MSR_FAM15H_PERFCTR4 0xc0010209 > +#define MSR_FAM15H_EVNTSEL5 0xc001020a > +#define MSR_FAM15H_PERFCTR5 0xc001020b Oh, and all of these would better have AMD in their name, too (other than K8, which really can be considered a product name, Fam15 is too generic imo, as any vendor could have such at some point). Jan > =20 > #define MSR_K8_FEATURE_MASK 0xc0011004 > #define MSR_K8_EXT_FEATURE_MASK 0xc0011005 >=20 >=20 > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xensource.com=20 > http://lists.xensource.com/xen-devel=20