From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Jan Beulich" Subject: RE: [PATCH 4] MCA physical address check when calculate domain Date: Tue, 10 May 2011 14:09:41 +0100 Message-ID: <4DC955350200007800040B6A@vpn.id2.novell.com> References: <4DC7CCF802000078000405A1@vpn.id2.novell.com> <4DC9142E020000780004094D@vpn.id2.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: Content-Disposition: inline List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: Jinsong Liu Cc: "xen-devel@lists.xensource.com" , Keir Fraser , Xin Li , Yunhong Jiang List-Id: xen-devel@lists.xenproject.org >>> On 10.05.11 at 12:46, "Liu, Jinsong" wrote: > Jan Beulich wrote: >>>>> On 10.05.11 at 08:38, "Liu, Jinsong" wrote: >>> As for physical addr, the addr in MCi_ADDR reg may be linear add/ >>> physical add/ setment offset. according to Intel SDM, the addr in >>> MCi_ADDR reg is physical addr only when: 1). MISCV bit of MCi_STATUS >>> set; 2). ADDRV bit of MCi_STATUS set; >>> 3). address mode of MCi_MISC (bit 6~8) =3D 010; >>=20 >> I realize this is what's being documented currently. Going back to the >> newest hard copy manual I still have (PentiumPro, which luckily is the >> first one where the banked implementation is described), there's no >> MCi_MISC (it's documented, but said to not be implemented on these >> old CPUs), and the description for the address reads "The address >> returned is either 32-bit virtual, 32-bit linear, or 36-bit >> physical". Now I certainly don't care much about PPro anymore, but I >> wonder when MCi_MISC was first implemented in the way your patch is >> using it.=20 >>=20 >=20 > Seems needn't care about when MCi_MISC first implemented. MCi_STATUS_MISC= V=20 > check can make sure accessing MCi_MISC safely. That wasn't my point. The question is whether there's a way to tell the address format when there's no MCi_MISC implemented (or whether all but *very* old CPUs have these registers for *all* their banks). Jan