From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Cooper Subject: APIC MSRs query Date: Tue, 17 May 2011 14:25:52 +0100 Message-ID: <4DD27760.9020706@citrix.com> Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: 7bit Return-path: List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xensource.com Errors-To: xen-devel-bounces@lists.xensource.com To: xen devel List-Id: xen-devel@lists.xenproject.org Hello, I am currently cleaning up the APIC code for the sake of shutdown/reboot/crashdump and have a query about the (modified for brevity) snippet of code: uint64_t msr_content; rdmsrl(MSR_IA32_APICBASE, msr_content); msr_content |= MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD; msr_content = (uint32_t)msr_content; wrmsrl(MSR_IA32_APICBASE, msr_content); which is added into apic.c in changeset b622e411eef8, and has propagated elsewhere in the codebase during subsequent cleanups etc. The MP spec and x2apic spec states that bits [35:12] of MSR_IA32_APICBASE is the base APIC MMIO address. Is there reason why the code (almost always) clears the top 4 bits, or is it just an overlooked mistake? -- Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer T: +44 (0)1223 225 900, http://www.citrix.com