Re: [PATCH] IRQ: manually EOI migrating line interrupts

[Andrew Cooper <andrew.cooper3@citrix.com>]

On 30/08/11 15:35, Keir Fraser wrote:
> On 30/08/2011 15:28, "Andrew Cooper" <andrew.cooper3@citrix.com> wrote:
>
>> P.S.
>>
>> Because this fix actually works, it means that EOI'ing the IO-APIC is
>> keyed only on vector, and not the target CPU.  As a result, having two
>> different interrupts in the IO-APIC with the same vector will result in
>> problems when trying to EOI one of them.
>>
>> I will address this problem as well in my IRQ cleanup, as I cant see any
>> checks for it currently.
> Isn't this a general issue with per-cpu vector allocations anyway? The usual
> irq-completion path of LAPIC EOI -> IO-APIC EOI broadcast will unavoidably
> have this issue. Every irq line on every IO-APIC currently programmed with
> that vector (regardless of target CPU) will get EOIed/unmasked. Not clear
> it's really a problem though! It might cause the odd spurious interrupt
> perhaps?
>
>  -- Keir

The manual (Section 10.8.5) says "If the terminated interrupt was a
level-triggered interrupt, the local APIC also sends an end-of-interrupt
message to all I/O APICs"

So the EOI broadcast only happens if the TMR bit say that the interrupt
was line level, which should make the code fine.

Alternatively, you can explicitly disable the EOI broadcast (if
supported - bit 24 of the Local APIC Version Register) by setting bit 12
of the SPIV Register, and manually writing to the IO-APIC EOI register.

-- 
Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer
T: +44 (0)1223 225 900, http://www.citrix.com