Re: [PATCH 4 of 4] CONFIG: remove #ifdef __ia64__ from the x86 arch tree

[Andrew Cooper <andrew.cooper3@citrix.com>]

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Version 3 attached.

It keeps the EOI register function, protected by an a check on the
IOAPIC version.

-- 
Andrew Cooper - Dom0 Kernel Engineer, Citrix XenServer
T: +44 (0)1223 225 900, http://www.citrix.com


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# HG changeset patch
# Parent a8f3abaaf3102ab493957d33e17ce59447915401
CONFIG: remove #ifdef __ia64__ from the x86 arch tree

__ia64__ really really should not be defined in the x86 arch subtree,
so remove it from xen/include/public/arch-x86/hvm/save.h

This in turn allows the removal of VIOAPIC_IS_IOSAPIC, as x86 does not
use streamlined {IO,L}APICs, allowing for the removal of more code
from the x86 tree.

Changes since v2:
 *  Leave the EOI register write protected by VIOAPIC_VERSION_ID >=
    0x20.  Currently, only version 0x11 is emulated, but leave this
    correct code in place in case a decision is make to emulate the
    newer version.

Changes since v1:
 *  Refresh patch following the decision not to try emulating a
    version 0x20 IOAPIC

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>

diff -r a8f3abaaf310 xen/arch/x86/hvm/vioapic.c
--- a/xen/arch/x86/hvm/vioapic.c
+++ b/xen/arch/x86/hvm/vioapic.c
@@ -59,12 +59,10 @@ static unsigned long vioapic_read_indire
                   | (VIOAPIC_VERSION_ID & 0xff));
         break;
 
-#if !VIOAPIC_IS_IOSAPIC
     case VIOAPIC_REG_APIC_ID:
     case VIOAPIC_REG_ARB_ID:
         result = ((vioapic->id & 0xf) << 24);
         break;
-#endif
 
     default:
     {
@@ -179,14 +177,12 @@ static void vioapic_write_indirect(
         /* Writes are ignored. */
         break;
 
-#if !VIOAPIC_IS_IOSAPIC
     case VIOAPIC_REG_APIC_ID:
         vioapic->id = (val >> 24) & 0xf;
         break;
 
     case VIOAPIC_REG_ARB_ID:
         break;
-#endif
 
     default:
     {
@@ -227,7 +223,7 @@ static int vioapic_write(
         vioapic_write_indirect(vioapic, length, val);
         break;
 
-#if VIOAPIC_IS_IOSAPIC
+#if VIOAPIC_VERSION_ID >= 0x20
     case VIOAPIC_REG_EOI:
         vioapic_update_EOI(v->domain, val);
         break;
diff -r a8f3abaaf310 xen/include/asm-x86/hvm/vioapic.h
--- a/xen/include/asm-x86/hvm/vioapic.h
+++ b/xen/include/asm-x86/hvm/vioapic.h
@@ -30,11 +30,7 @@
 #include <xen/smp.h>
 #include <public/hvm/save.h>
 
-#if !VIOAPIC_IS_IOSAPIC
 #define VIOAPIC_VERSION_ID 0x11 /* IOAPIC version */
-#else
-#define VIOAPIC_VERSION_ID 0x21 /* IOSAPIC version */
-#endif
 
 #define VIOAPIC_EDGE_TRIG  0
 #define VIOAPIC_LEVEL_TRIG 1
diff -r a8f3abaaf310 xen/include/public/arch-x86/hvm/save.h
--- a/xen/include/public/arch-x86/hvm/save.h
+++ b/xen/include/public/arch-x86/hvm/save.h
@@ -344,12 +344,7 @@ DECLARE_HVM_SAVE_TYPE(PIC, 3, struct hvm
  * IO-APIC
  */
 
-#ifdef __ia64__
-#define VIOAPIC_IS_IOSAPIC 1
-#define VIOAPIC_NUM_PINS  24
-#else
 #define VIOAPIC_NUM_PINS  48 /* 16 ISA IRQs, 32 non-legacy PCI IRQS. */
-#endif
 
 struct hvm_hw_vioapic {
     uint64_t base_address;
@@ -368,13 +363,8 @@ struct hvm_hw_vioapic {
             uint8_t trig_mode:1;
             uint8_t mask:1;
             uint8_t reserve:7;
-#if !VIOAPIC_IS_IOSAPIC
             uint8_t reserved[4];
             uint8_t dest_id;
-#else
-            uint8_t reserved[3];
-            uint16_t dest_id;
-#endif
         } fields;
     } redirtbl[VIOAPIC_NUM_PINS];
 };

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