* [PATCH v2] x86: Use deep C states for off-lined CPUs
@ 2012-03-01 22:54 Boris Ostrovsky
2012-03-04 15:09 ` Liu, Jinsong
0 siblings, 1 reply; 4+ messages in thread
From: Boris Ostrovsky @ 2012-03-01 22:54 UTC (permalink / raw)
To: jinsong.liu, yang.z.zhang, JBeulich; +Cc: boris.ostrovsky, xen-devel
# HG changeset patch
# User Boris Ostrovsky <boris.ostrovsky@amd.com>
# Date 1330642361 -3600
# Node ID 99df5c6b2964ceaa73651d7bc02fb1ae820f7691
# Parent a7bacdc5449a2f7bb9c35b2a1334b463fe9f29a9
x86: Use deep C states for off-lined CPUs
Currently when a core is taken off-line it is placed in C1 state (unless
MONITOR/MWAIT is used). This patch allows a core to go to deeper C states
resulting in significantly higher power savings.
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@amd.com>
diff -r a7bacdc5449a -r 99df5c6b2964 xen/arch/x86/acpi/cpu_idle.c
--- a/xen/arch/x86/acpi/cpu_idle.c Mon Feb 27 17:05:18 2012 +0000
+++ b/xen/arch/x86/acpi/cpu_idle.c Thu Mar 01 23:52:41 2012 +0100
@@ -566,6 +566,7 @@ static void acpi_dead_idle(void)
struct acpi_processor_power *power;
struct acpi_processor_cx *cx;
void *mwait_ptr;
+ struct cpuinfo_x86 *c = ¤t_cpu_data;
if ( (power = processor_powers[smp_processor_id()]) == NULL )
goto default_halt;
@@ -601,6 +602,23 @@ static void acpi_dead_idle(void)
mb();
__mwait(cx->address, 0);
}
+ }
+ else if ( c->x86_vendor == X86_VENDOR_AMD &&
+ cx->entry_method == ACPI_CSTATE_EM_SYSIO )
+ {
+ /* Intel prefers not to use SYSIO */
+
+ /* Avoid references to shared data after the cache flush */
+ u32 address = cx->address;
+ u32 pmtmr_ioport_local = pmtmr_ioport;
+
+ wbinvd();
+
+ while ( 1 )
+ {
+ inb(address);
+ inl(pmtmr_ioport_local);
+ }
}
default_halt:
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] x86: Use deep C states for off-lined CPUs
2012-03-01 22:54 [PATCH v2] x86: Use deep C states for off-lined CPUs Boris Ostrovsky
@ 2012-03-04 15:09 ` Liu, Jinsong
2012-03-05 17:01 ` Boris Ostrovsky
0 siblings, 1 reply; 4+ messages in thread
From: Liu, Jinsong @ 2012-03-04 15:09 UTC (permalink / raw)
To: Boris Ostrovsky, Zhang, Yang Z, JBeulich@suse.com
Cc: xen-devel@lists.xensource.com
Fine to me.
BTW, seems another patch moving mwait_ptr declaration and related code into if(FFH) is slightly better? It's FFH staff anyway.
Thanks,
Jinsong
Boris Ostrovsky wrote:
> # HG changeset patch
> # User Boris Ostrovsky <boris.ostrovsky@amd.com>
> # Date 1330642361 -3600
> # Node ID 99df5c6b2964ceaa73651d7bc02fb1ae820f7691
> # Parent a7bacdc5449a2f7bb9c35b2a1334b463fe9f29a9
> x86: Use deep C states for off-lined CPUs
>
> Currently when a core is taken off-line it is placed in C1 state
> (unless MONITOR/MWAIT is used). This patch allows a core to go to
> deeper C states resulting in significantly higher power savings.
>
> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@amd.com>
>
> diff -r a7bacdc5449a -r 99df5c6b2964 xen/arch/x86/acpi/cpu_idle.c
> --- a/xen/arch/x86/acpi/cpu_idle.c Mon Feb 27 17:05:18 2012 +0000
> +++ b/xen/arch/x86/acpi/cpu_idle.c Thu Mar 01 23:52:41 2012 +0100
> @@ -566,6 +566,7 @@ static void acpi_dead_idle(void)
> struct acpi_processor_power *power;
> struct acpi_processor_cx *cx;
> void *mwait_ptr;
> + struct cpuinfo_x86 *c = ¤t_cpu_data;
>
> if ( (power = processor_powers[smp_processor_id()]) == NULL )
> goto default_halt;
> @@ -601,6 +602,23 @@ static void acpi_dead_idle(void)
> mb();
> __mwait(cx->address, 0);
> }
> + }
> + else if ( c->x86_vendor == X86_VENDOR_AMD &&
> + cx->entry_method == ACPI_CSTATE_EM_SYSIO )
> + {
> + /* Intel prefers not to use SYSIO */
> +
> + /* Avoid references to shared data after the cache flush */
> + u32 address = cx->address;
> + u32 pmtmr_ioport_local = pmtmr_ioport;
> +
> + wbinvd();
> +
> + while ( 1 )
> + {
> + inb(address);
> + inl(pmtmr_ioport_local);
> + }
> }
>
> default_halt:
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] x86: Use deep C states for off-lined CPUs
2012-03-04 15:09 ` Liu, Jinsong
@ 2012-03-05 17:01 ` Boris Ostrovsky
2012-03-05 17:13 ` Jan Beulich
0 siblings, 1 reply; 4+ messages in thread
From: Boris Ostrovsky @ 2012-03-05 17:01 UTC (permalink / raw)
To: Liu, Jinsong
Cc: Zhang, Yang Z, xen-devel@lists.xensource.com, JBeulich@suse.com
Jan was objecting to moving it in this patch because it is not directly
related to the functionality that the patch was addressing. Or was it
because it wasn't properly done?
-boris
On 03/04/12 10:09, Liu, Jinsong wrote:
> Fine to me.
> BTW, seems another patch moving mwait_ptr declaration and related code into if(FFH) is slightly better? It's FFH staff anyway.
>
> Thanks,
> Jinsong
>
> Boris Ostrovsky wrote:
>> # HG changeset patch
>> # User Boris Ostrovsky<boris.ostrovsky@amd.com>
>> # Date 1330642361 -3600
>> # Node ID 99df5c6b2964ceaa73651d7bc02fb1ae820f7691
>> # Parent a7bacdc5449a2f7bb9c35b2a1334b463fe9f29a9
>> x86: Use deep C states for off-lined CPUs
>>
>> Currently when a core is taken off-line it is placed in C1 state
>> (unless MONITOR/MWAIT is used). This patch allows a core to go to
>> deeper C states resulting in significantly higher power savings.
>>
>> Signed-off-by: Boris Ostrovsky<boris.ostrovsky@amd.com>
>>
>> diff -r a7bacdc5449a -r 99df5c6b2964 xen/arch/x86/acpi/cpu_idle.c
>> --- a/xen/arch/x86/acpi/cpu_idle.c Mon Feb 27 17:05:18 2012 +0000
>> +++ b/xen/arch/x86/acpi/cpu_idle.c Thu Mar 01 23:52:41 2012 +0100
>> @@ -566,6 +566,7 @@ static void acpi_dead_idle(void)
>> struct acpi_processor_power *power;
>> struct acpi_processor_cx *cx;
>> void *mwait_ptr;
>> + struct cpuinfo_x86 *c =¤t_cpu_data;
>>
>> if ( (power = processor_powers[smp_processor_id()]) == NULL )
>> goto default_halt;
>> @@ -601,6 +602,23 @@ static void acpi_dead_idle(void)
>> mb();
>> __mwait(cx->address, 0);
>> }
>> + }
>> + else if ( c->x86_vendor == X86_VENDOR_AMD&&
>> + cx->entry_method == ACPI_CSTATE_EM_SYSIO )
>> + {
>> + /* Intel prefers not to use SYSIO */
>> +
>> + /* Avoid references to shared data after the cache flush */
>> + u32 address = cx->address;
>> + u32 pmtmr_ioport_local = pmtmr_ioport;
>> +
>> + wbinvd();
>> +
>> + while ( 1 )
>> + {
>> + inb(address);
>> + inl(pmtmr_ioport_local);
>> + }
>> }
>>
>> default_halt:
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH v2] x86: Use deep C states for off-lined CPUs
2012-03-05 17:01 ` Boris Ostrovsky
@ 2012-03-05 17:13 ` Jan Beulich
0 siblings, 0 replies; 4+ messages in thread
From: Jan Beulich @ 2012-03-05 17:13 UTC (permalink / raw)
To: Boris Ostrovsky; +Cc: Jinsong Liu, Yang Z Zhang, xen-devel@lists.xensource.com
>>> On 05.03.12 at 18:01, Boris Ostrovsky <boris.ostrovsky@amd.com> wrote:
> Jan was objecting to moving it in this patch because it is not directly
> related to the functionality that the patch was addressing. Or was it
> because it wasn't properly done?
And similarly Jinsong suggested to do this in _another_ patch.
Jan
> On 03/04/12 10:09, Liu, Jinsong wrote:
>> Fine to me.
>> BTW, seems another patch moving mwait_ptr declaration and related code into
> if(FFH) is slightly better? It's FFH staff anyway.
>>
>> Thanks,
>> Jinsong
>>
>> Boris Ostrovsky wrote:
>>> # HG changeset patch
>>> # User Boris Ostrovsky<boris.ostrovsky@amd.com>
>>> # Date 1330642361 -3600
>>> # Node ID 99df5c6b2964ceaa73651d7bc02fb1ae820f7691
>>> # Parent a7bacdc5449a2f7bb9c35b2a1334b463fe9f29a9
>>> x86: Use deep C states for off-lined CPUs
>>>
>>> Currently when a core is taken off-line it is placed in C1 state
>>> (unless MONITOR/MWAIT is used). This patch allows a core to go to
>>> deeper C states resulting in significantly higher power savings.
>>>
>>> Signed-off-by: Boris Ostrovsky<boris.ostrovsky@amd.com>
>>>
>>> diff -r a7bacdc5449a -r 99df5c6b2964 xen/arch/x86/acpi/cpu_idle.c
>>> --- a/xen/arch/x86/acpi/cpu_idle.c Mon Feb 27 17:05:18 2012 +0000
>>> +++ b/xen/arch/x86/acpi/cpu_idle.c Thu Mar 01 23:52:41 2012 +0100
>>> @@ -566,6 +566,7 @@ static void acpi_dead_idle(void)
>>> struct acpi_processor_power *power;
>>> struct acpi_processor_cx *cx;
>>> void *mwait_ptr;
>>> + struct cpuinfo_x86 *c =¤t_cpu_data;
>>>
>>> if ( (power = processor_powers[smp_processor_id()]) == NULL )
>>> goto default_halt;
>>> @@ -601,6 +602,23 @@ static void acpi_dead_idle(void)
>>> mb();
>>> __mwait(cx->address, 0);
>>> }
>>> + }
>>> + else if ( c->x86_vendor == X86_VENDOR_AMD&&
>>> + cx->entry_method == ACPI_CSTATE_EM_SYSIO )
>>> + {
>>> + /* Intel prefers not to use SYSIO */
>>> +
>>> + /* Avoid references to shared data after the cache flush */
>>> + u32 address = cx->address;
>>> + u32 pmtmr_ioport_local = pmtmr_ioport;
>>> +
>>> + wbinvd();
>>> +
>>> + while ( 1 )
>>> + {
>>> + inb(address);
>>> + inl(pmtmr_ioport_local);
>>> + }
>>> }
>>>
>>> default_halt:
>>
>>
^ permalink raw reply [flat|nested] 4+ messages in thread
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2012-03-01 22:54 [PATCH v2] x86: Use deep C states for off-lined CPUs Boris Ostrovsky
2012-03-04 15:09 ` Liu, Jinsong
2012-03-05 17:01 ` Boris Ostrovsky
2012-03-05 17:13 ` Jan Beulich
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