From mboxrd@z Thu Jan 1 00:00:00 1970 From: Raghavendra K T Subject: Re: [PATCH RFC V8 0/17] Paravirtualized ticket spinlocks Date: Mon, 07 May 2012 20:17:10 +0530 Message-ID: <4FA7E06E.20304@linux.vnet.ibm.com> References: <20120502100610.13206.40.sendpatchset@codeblue.in.ibm.com> <20120507082928.GI16608@gmail.com> <4FA7888F.80505@redhat.com> <4FA7AAD8.6050003@linux.vnet.ibm.com> <4FA7BABA.4040700@redhat.com> <4FA7CC05.50808@linux.vnet.ibm.com> <4FA7CCA2.4030408@redhat.com> <4FA7D06B.60005@linux.vnet.ibm.com> <20120507134611.GB5533@linux.vnet.ibm.com> <4FA7D2E5.1020607@redhat.com> <4FA7D3F7.9080005@linux.vnet.ibm.com> <4FA7D50D.1020209@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <4FA7D50D.1020209@redhat.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: virtualization-bounces@lists.linux-foundation.org Errors-To: virtualization-bounces@lists.linux-foundation.org To: Avi Kivity Cc: Jeremy Fitzhardinge , Greg Kroah-Hartman , KVM , linux-doc@vger.kernel.org, Srivatsa Vaddagiri , Andi Kleen , "H. Peter Anvin" , Ingo Molnar , Stefano Stabellini , Xen Devel , X86 , Ingo Molnar , Peter Zijlstra , Konrad Rzeszutek Wilk , Thomas Gleixner , Virtualization , LKML , Attilio Rao , Andrew Morton , Linus Torvalds , Stephan Diestelhorst List-Id: xen-devel@lists.xenproject.org On 05/07/2012 07:28 PM, Avi Kivity wrote: > On 05/07/2012 04:53 PM, Raghavendra K T wrote: >>> Is the improvement so low, because PLE is interfering with the patch, or >>> because PLE already does a good job? >>> >> >> >> It is because PLE already does a good job (of not burning cpu). The >> 1-3% improvement is because, patchset knows atleast who is next to hold >> lock, which is lacking in PLE. >> > > Not good. Solving a problem in software that is already solved by > hardware? It's okay if there are no costs involved, but here we're > introducing a new ABI that we'll have to maintain for a long time. > Hmm agree that being a step ahead of mighty hardware (and just an improvement of 1-3%) is no good for long term (where PLE is future). Having said that, it is hard for me to resist saying : bottleneck is somewhere else on PLE m/c and IMHO answer would be combination of paravirt-spinlock + pv-flush-tb. But I need to come up with good number to argue in favour of the claim. PS: Nikunj had experimented that pv-flush tlb + paravirt-spinlock is a win on PLE where only one of them alone could not prove the benefit.