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From: Christoph Egger <Christoph.Egger@amd.com>
To: Tim Deegan <tim@xen.org>
Cc: "xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Subject: Re: [PATCH] nestedhvm: fix write access fault on ro mapping
Date: Fri, 27 Jul 2012 13:57:34 +0200	[thread overview]
Message-ID: <5012822E.2030603@amd.com> (raw)
In-Reply-To: <20120726182111.GB4135@ocelot.phlegethon.org>

On 07/26/12 20:21, Tim Deegan wrote:

> At 16:15 +0200 on 19 Jul (1342714507), Christoph Egger wrote:
>>
>> Fix write access fault when host npt is mapped read-only.
>> In this case let the host handle the #NPF.
>> Apply host p2mt to hap-on-hap pagetable entry.
>> This fixes the l2 guest graphic display refresh problem.
> 
>> diff -r ae0e96e156f3 xen/arch/x86/hvm/hvm.c
>> --- a/xen/arch/x86/hvm/hvm.c	Thu Jul 19 12:12:12 2012 +0200
>> +++ b/xen/arch/x86/hvm/hvm.c	Thu Jul 19 15:30:04 2012 +0200
>> @@ -1291,6 +1291,8 @@ int hvm_hap_nested_page_fault(unsigned l
>>              if ( !handle_mmio() )
>>                  hvm_inject_hw_exception(TRAP_gp_fault, 0);
>>              return 1;
>> +        case NESTEDHVM_PAGEFAULT_READONLY:
>> +            break;
> 
> Don't we have to translate the faulting PA into an L1 address before
> letting the rest of this fault handler run?  It explicitly operates on
> the hostp2m.  
> 
> If we do that, we should probably do it for NESTEDHVM_PAGEFAULT_ERROR,
> rather than special-casing READONLY.  That way any other
> automatically-fixed types (like the p2m_access magic) will be covered
> too.


How do you differentiate if the error happened from walking l1 npt or
host npt ?
In the first case it isn't possible to provide l1 address.

Christoph


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  reply	other threads:[~2012-07-27 11:57 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-07-19 14:15 [PATCH] nestedhvm: fix write access fault on ro mapping Christoph Egger
2012-07-26 18:21 ` Tim Deegan
2012-07-27 11:57   ` Christoph Egger [this message]
2012-08-02 10:45     ` Tim Deegan
2012-08-02 12:32       ` Christoph Egger
2012-08-02 13:40         ` Tim Deegan

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