Re: [PATCH] VTD/Intremap: Disable Intremap on Chipset 5500/5520/X58 due to errata

[Malcolm Crossley <malcolm.crossley@citrix.com>]

On 16/01/13 13:57, Jan Beulich wrote:
>>>> On 16.01.13 at 00:27, Malcolm Crossley <malcolm.crossley@citrix.com> wrote:
>> http://www.intel.com/content/www/us/en/chipsets/5520-and-5500-chipset-ioh-specific
>> ation-update.html
>>
>> Stepping B-3 has two errata (#47 and #53) related to Interrupt
>> remapping, to which the workaround is for the BIOS to completely disable
>> interrupt remapping.  These errata are fixed in stepping C-2.
>>
>> Unfortunately this chipset is very common and many BIOSes are not
>> disabling remapping.  We can detect this in Xen and prevent turning on
>> remapping in the first place.  However, this will turn VT-d off on many
>> systems by default.
>>
>> Users who still wish to use VT-d can use iommu=force if they are happy
>> exposing the associated security risk.
>>
>> Signed-off-by: Malcolm Crossley <malcolm.crossley@citrix.com>
>> Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
>>
>> diff -r 35a0556a7f76 -r ee475f0e6aeb xen/drivers/passthrough/vtd/quirks.c
>> --- a/xen/drivers/passthrough/vtd/quirks.c
>> +++ b/xen/drivers/passthrough/vtd/quirks.c
>> @@ -244,6 +244,29 @@ void vtd_ops_postamble_quirk(struct iomm
>>       }
>>   }
>>   
>> +/* 5500/5520/X58 Chipset Interrupt remapping errata, for stepping B-3.
>> + * Fixed in stepping C-2. */
>> +void __init tylersburg_intremap_quirk(void)
>> +{
>> +    uint32_t bus, device;
>> +    uint8_t rev;
>> +
>> +    for ( bus = 0; bus < 0x100; bus++ )
>> +    {
>> +        /* Match on System Management Registers on Device 20 Function 0 */
>> +        device = pci_conf_read32(0, bus, 20, 0, PCI_VENDOR_ID);
>> +        rev = pci_conf_read8(0, bus, 20, 0, PCI_REVISION_ID);
>> +
>> +        if ( rev == 0x13 && device == 0x342e8086 )
>> +        {
>> +            dprintk(XENLOG_INFO VTDPREFIX,
>> +                    "Disabling Interrupt Remapping due to Intel 5500/5520/X58 Chipset errata #47, #53\n");
>> +            iommu_intremap = 0;
> Unless it is guaranteed that no system with this chipset can have
> x2APIC, I don't think this is right. For one, this happens way too
> late (namely after x2apic_bsp_setup()). And second, if you move
> this earlier, such systems with x2APIC pre-enabled won't boot
> anymore.
After some digging, I discovered that the errata affects chipsets 
(5520,5500,X58) which don't have IOMMU EIM( Extended Interrupt Mode) 
support. EIM is required to support x2APIC mode and so this means the 
chipset can't support x2APIC mode and so we should never see a system 
with x2APIC enabled.

For reference, the chipset of this processor generation which does 
support EIM is the 7500 and it does not suffer from this errata.

Currently Xen is relying on the ACPI_DMAR_X2APIC_OPT_OUT bit in the DMAR 
table to detect x2apic support in the IOMMU.  In theory it would be 
better to read the EIM bit in the IOMMU device itself instead of relying 
on the BIOS but this may be difficult to do at that early stage of 
initialisation of Xen.

Malcolm

>
>> +            break;
>> +        }
>> +    }
>> +}
>> +
>>   /* initialize platform identification flags */
>>   void __init platform_quirks_init(void)
>>   {
>> @@ -264,6 +287,9 @@ void __init platform_quirks_init(void)
>>   
>>       /* ioremap IGD MMIO+0x2000 page */
>>       map_igd_reg();
>> +
>> +    /* Tylersburg interrupt remap quirk */
>> +    tylersburg_intremap_quirk();
>>   }
>>   
>>   /*
>>
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>
>