From mboxrd@z Thu Jan  1 00:00:00 1970
From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Subject: LVTPC masking in Intel VPMU code
Date: Wed, 27 Mar 2013 17:34:23 -0400
Message-ID: <515365DF.7000600@oracle.com>
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Can someone explain why we have these lines in 
vpmu_core2.c:core2_vpmu_do_interrupt():
     apic_write_around(APIC_LVTPC, apic_read(APIC_LVTPC) & 
~APIC_LVT_MASKED);
     ...
     vlapic_set_reg(vlapic, APIC_LVTPC, vlapic_lvtpc | APIC_LVT_MASKED);

There is similar code in Linux oprofile with a comment that this is done 
due to some sort of
a quirk on P4 and PentiumM. Is this why it's in 
core2_vpmu_do_interrupt() as well?

I don't see a quirk like this in Linux perf code.


-boris