From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulpanit Subject: Re: [PATCH 0/4] x86/IOMMU: multi-vector MSI prerequisites Date: Fri, 29 Mar 2013 00:18:36 -0500 Message-ID: <5155242C.1070803@amd.com> References: <51516FA502000078000C86E1@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <51516FA502000078000C86E1@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: Jacob Shin , xiantao.zhang@intel.com, xen-devel List-Id: xen-devel@lists.xenproject.org Jan, I found an issue when booting the hypervisor after the patch with assertion at the line 64 of iommu_intr.c (in function get_intremap_entry). Stack dump: ........... get_intremap_entry+0x39/0x58 amd_iommu_read_msi_from_ire+0x74/0xac iommu_read_msi_from_ire+0x3c/0x3f set_msi_affinity+0x161/0x1ae enable_iommu+0x681/0x7d2 amd_iommu_init+0x50b/0x6b1 amd_iov_detect+0x69/0xad iommu_setup+0x67/0x171 __start_xen+0x278c/0x2b9d ************************************ Panic on CPU 0: Assertion '(table != NULL) && (offset < INTREMAP_ENTRIES)' failed at iommu_intr.c:64 ************************************* Investigation showing table is not null and offset = 0. Suravee On 3/26/2013 3:51 AM, Jan Beulich wrote: > 1: IOMMU: allow MSI message to IRTE propagation to fail > 2: x86/MSI: cleanup to prepare for multi-vector MSI > 3: AMD IOMMU: allocate IRTE entries instead of using a static mapping > 4: AMD IOMMU: untie remap and vector maps > > Note that especially patch 3 is more RFC-like, as I continue to have > no way to test this here. > > Signed-off-by: Jan Beulich > >