Re: [PATCH] iommu-remote: Fix lost serial TX interrupts. Report receive overruns.

[Trolle Selander <trolle.selander@gmail.com>]

On Thu, Jan 28, 2010 at 6:26 PM, Justin T. Gibbs <gibbs@scsiguy.com> wrote:
> This patch corrects emulation errors in QEMU's 16550 uart emulation,
> which cause compatibility issues with FreeBSD's uart(9) driver.
>
>  o Implement receive overrun status.  The FreeBSD uart(9) driver
>    relies on this status in it's probe routine to determine the size
>    of the FIFO supported.
>  o As per the 16550 spec, do not overwrite the RX FIFO on an RX overrun.
>  o Do not allow TX or RX FIFO overruns to increment the data valid count
>    beyond the size of the FIFO.
>  o For reads of the IIR register, only clear the "TX holding register
>    empty" (THRE) interrupt if the read reports this interrupt.  This
>    is required by the specification and avoids losing TX interrupts
>    when other, higher priority interrupts (usually RX) are reported first.
>
> This patch also includes a fix for a second cause of lost TX interrupts,
> which was submitted by Jergen Lock, and is already in the latest QEMU.
>
>  o If a receive interrupt is suppressed due to the FIFO not yet filling
>    to its interrupt threshold, do not also supress any pending THRE
>    interrupt.
>
> A version of this patch, against the latest QEMU, has also been submitted
> to the qemu-devel mailing list.
>
> Signed-off-by: Justin T. Gibbs <gibbs@FreeBSD.org>
>
> Index: xen-4.0.0-testing/tools/ioemu-remote/hw/serial.c
> ===================================================================
> --- xen-4.0.0-testing.orig/tools/ioemu-remote/hw/serial.c
> +++ xen-4.0.0-testing/tools/ioemu-remote/hw/serial.c
> @@ -159,11 +159,19 @@
>  {
>     SerialFIFO *f = (fifo) ? &s->recv_fifo : &s->xmit_fifo;
>
> -    f->data[f->head++] = chr;
> +    /* Receive overruns do not overwrite FIFO contents. */
> +    if (fifo == XMIT_FIFO || f->count < UART_FIFO_LENGTH) {
>
> -    if (f->head == UART_FIFO_LENGTH)
> -        f->head = 0;
> -    f->count++;
> +        f->data[f->head++] = chr;
> +
> +        if (f->head == UART_FIFO_LENGTH)
> +            f->head = 0;
> +    }
> +
> +    if (f->count < UART_FIFO_LENGTH)
> +        f->count++;
> +    else if (fifo == RECV_FIFO)
> +        s->lsr |= UART_LSR_OE;
>
>     return 1;
>  }
> @@ -195,12 +203,10 @@
>          * this is not in the specification but is observed on existing
>          * hardware.  */
>         tmp_iir = UART_IIR_CTI;
> -    } else if ((s->ier & UART_IER_RDI) && (s->lsr & UART_LSR_DR)) {
> -        if (!(s->fcr & UART_FCR_FE)) {
> -           tmp_iir = UART_IIR_RDI;
> -        } else if (s->recv_fifo.count >= s->recv_fifo.itl) {
> -           tmp_iir = UART_IIR_RDI;
> -        }
> +    } else if ((s->ier & UART_IER_RDI) && (s->lsr & UART_LSR_DR) &&
> +               (!(s->fcr & UART_FCR_FE) ||
> +                s->recv_fifo.count >= s->recv_fifo.itl)) {
> +        tmp_iir = UART_IIR_RDI;
>     } else if ((s->ier & UART_IER_THRI) && s->thr_ipending) {
>         tmp_iir = UART_IIR_THRI;
>     } else if ((s->ier & UART_IER_MSI) && (s->msr & UART_MSR_ANY_DELTA)) {
> @@ -523,8 +529,10 @@
>         break;
>     case 2:
>         ret = s->iir;
> -        s->thr_ipending = 0;
> -        serial_update_irq(s);
> +        if (ret & UART_IIR_THRI) {
> +            s->thr_ipending = 0;
> +            serial_update_irq(s);
> +        }
>         break;
>     case 3:
>         ret = s->lcr;
> @@ -534,9 +542,9 @@
>         break;
>     case 5:
>         ret = s->lsr;
> -        /* Clear break interrupt */
> -        if (s->lsr & UART_LSR_BI) {
> -            s->lsr &= ~UART_LSR_BI;
> +        /* Clear break and overrun interrupts */
> +        if (s->lsr & (UART_LSR_BI|UART_LSR_OE)) {
> +            s->lsr &= ~(UART_LSR_BI|UART_LSR_OE);
>             serial_update_irq(s);
>         }
>         break;
>
>
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>

I'm assuming the overrun bugs were only triggered when the uart was
put in loopback mode? Receive overruns & receive FIFO overwrite should
never be able to occur during normal operation,since unless there is
"room" in either the FIFO or DR is set in the lsr, serial_can_receive
will return 0, and no further data will be "fed" to the emulated
device. Looking through the code, I noticed that serial_xmit calls
serial_receive1 directly when in loopback, however.
Good catch on the xmit_fifo overwrite check. Again, due to the way the
uart emulation works, this was not a situation that should ever be
able to occur, since serial_xmit will get called immediately after
every port write, and if the reader can't "keep up", after 4 failed
writes, any further writes from emulated uart -> backing device will
be immediately discarded until one goes through. Thus xmit FIFO fill
should in fact never be able to go above 4 in practice. The exception
would be if the backing device is a real serial port, and it was set
to a lower baudrate than the virtual device - but again, this should
not occur since qemu changes the baudrate of the backing port to
whatever the virtual device is set to.

If, however, you were seeing receive data being lost in "real"
operation with serial-backed-serial, then there might be something
else going on. I'm mentioning this because have seen issues with that
in the past, and it was in fact the reason that I wrote the 16450 ->
16550 upgrade patch in the first place, since more agressive reading
from the physical serial port helped the issue to some degree.

-- Trolle