From mboxrd@z Thu Jan 1 00:00:00 1970 From: Suravee Suthikulpanit Subject: Re: Xen 4.3 development update Date: Tue, 2 Apr 2013 11:47:39 -0500 Message-ID: <515B0BAB.1060906@amd.com> References: <515B186F02000078000CA1A7@nat28.tlf.novell.com> <20130402163440.GB17022@ocelot.phlegethon.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20130402163440.GB17022@ocelot.phlegethon.org> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Tim Deegan Cc: George Dunlap , Andres Lagar-Cavilla , Jan Beulich , "xen-devel@lists.xen.org" List-Id: xen-devel@lists.xenproject.org On 4/2/2013 11:34 AM, Tim Deegan wrote: > At 16:42 +0100 on 02 Apr (1364920927), Jan Beulich wrote: >>>>> On 02.04.13 at 16:07, George Dunlap wrote: >>> * AMD NPT performance regression after c/s 24770:7f79475d3de7 >>> owner: ? >>> Reference: http://marc.info/?l=xen-devel&m=135075376805215 >> This is supposedly fixed with the RTC changes Tim committed the >> other day. Suravee, is that correct? > This is a separate problem. IIRC the AMD XP perf issue is caused by the > emulation of LAPIC TPR accesses slowing down with Andres's p2m locking > patches. XP doesn't have 'lazy IRQL' or support for CR8, so it takes a > _lot_ of vmexits for IRQL reads and writes. Is this only for 32-bit XP? or also 64-bit ? Suravee > Tim. >