From mboxrd@z Thu Jan 1 00:00:00 1970 From: George Dunlap Subject: Re: Xen 4.3 development update Date: Wed, 3 Apr 2013 11:53:01 +0100 Message-ID: <515C0A0D.6020007@eu.citrix.com> References: <515B186F02000078000CA1A7@nat28.tlf.novell.com> <20130402163440.GB17022@ocelot.phlegethon.org> <515BF5F102000078000CA39C@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <515BF5F102000078000CA39C@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: "Tim (Xen.org)" , Andres Lagar-Cavilla , "suravee.suthikulpanit@amd.com" , "xen-devel@lists.xen.org" List-Id: xen-devel@lists.xenproject.org On 03/04/13 08:27, Jan Beulich wrote: >>>> On 02.04.13 at 18:34, Tim Deegan wrote: >> At 16:42 +0100 on 02 Apr (1364920927), Jan Beulich wrote: >>>>>> On 02.04.13 at 16:07, George Dunlap wrote: >>>> * AMD NPT performance regression after c/s 24770:7f79475d3de7 >>>> owner: ? >>>> Reference: http://marc.info/?l=xen-devel&m=135075376805215 >>> This is supposedly fixed with the RTC changes Tim committed the >>> other day. Suravee, is that correct? >> This is a separate problem. IIRC the AMD XP perf issue is caused by the >> emulation of LAPIC TPR accesses slowing down with Andres's p2m locking >> patches. XP doesn't have 'lazy IRQL' or support for CR8, so it takes a >> _lot_ of vmexits for IRQL reads and writes. > Ah, okay, sorry for mixing this up. But how is this a regression > then? My sense, when I looked at this back whenever that there was much more to this. The XP IRQL updating is a problem, but it's made terribly worse by the changset in question. It seemed to me like the kind of thing that would be caused by TLB or caches suddenly becoming much less effective. -George