From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Subject: Re: [PATCH 1/4] xen/arm: basic PSCI support, implement cpu_on Date: Wed, 10 Apr 2013 11:41:42 +0100 Message-ID: <516541E6.90404@arm.com> References: <1363891353-13827-1-git-send-email-stefano.stabellini@eu.citrix.com> <1365515874.10725.33.camel@zakaz.uk.xensource.com> <51642477.5050503@arm.com> <1365588826.26448.1.camel@zakaz.uk.xensource.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1365588826.26448.1.camel@zakaz.uk.xensource.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Ian Campbell Cc: Will Deacon , "xen-devel@lists.xensource.com" , "Tim (Xen.org)" , Stefano Stabellini List-Id: xen-devel@lists.xenproject.org On 10/04/13 11:13, Ian Campbell wrote: > On Tue, 2013-04-09 at 15:23 +0100, Marc Zyngier wrote: >> On 09/04/13 14:57, Ian Campbell wrote: >>> On Thu, 2013-03-21 at 18:42 +0000, Stefano Stabellini wrote: >>>> Implement support for ARM Power State Coordination Interface, PSCI in >>>> short. The current implementation is based on HVC and only supports the >>>> cpu_on call. >>> >>> Doesn't the PSCI interface require the use of SMC not HVC? >> >> You can use both, and KVM uses HVC. > > It makes good sense for Xen to follow suit then I think. > >>> I thought I heard Charles say at connect that there was now a PSCI v2, >>> and I suspect I'm looking at the v1 document (which mentions HVC only in >>> passing). Which interface did you implement? >>> >>> Anyhow, we can trap SMCs to the hypervisor by setting the right control >>> register bits. We should do this anyway -- no good can come of a guest >>> making a call direct to the monitor! >> >> Trapping guest access to Secure mode is always a good idea! ;-) > > :-) > >> Unfortunately, there's a catch on ARMv8. If the CPU doesn't implement >> secure mode, then SMC will UNDEF at the current exception level (not >> trapping to EL2). Which means that for ARMv8, you basically have to >> mandate HVC for PSCI at the HYP level... > > That pretty much seals it then! > > Do I infer that on v7 SMC w/o security extensions will trap? ARMv7 mandates security extensions if you have virtualization extensions, so this is a moot point... ;-) M. -- Jazz is not dead. It just smells funny...