From: Suravee Suthikulanit <suravee.suthikulpanit@amd.com>
To: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: xen-devel@lists.xen.org, jacob.shin@amd.com, "Hurwitz,
Sherry" <sherry.hurwitz@amd.com>
Subject: Re: [PATCH 0/8] Various VPMU patches
Date: Wed, 10 Apr 2013 13:49:29 -0500 [thread overview]
Message-ID: <5165B439.8030309@amd.com> (raw)
In-Reply-To: <1365528379-2516-1-git-send-email-boris.ostrovsky@oracle.com>
Boris,
I am trying the patch set on the trinity and ran into the following issue:
root@sos-dev02:/sandbox/xen/xen-git-boris# xl create
/sandbox/vm-images/xen-configs/ubuntu-12.10_dom.hvm
Parsing config from /sandbox/vm-images/xen-configs/ubuntu-12.10_dom.hvm
libxl: error: libxl_create.c:416:libxl__domain_make: domain creation fail
libxl: error: libxl_create.c:644:initiate_domain_create: cannot make
domain: -3
libxl: error: libxl.c:1377:libxl__destroy_domid: non-existant domain -1
libxl: error: libxl.c:1341:domain_destroy_callback: unable to destroy
guest with domid 4294967295
libxl: error: libxl_create.c:1208:domcreate_destruction_cb: unable to
destroy domain 4294967295 following failed creation
root@sos-dev02:/sandbox/xen/xen-git-boris#
The same hvm config file starts up fine on older hypervisor. Any clues?
Suravee
On 4/9/2013 12:26 PM, Boris Ostrovsky wrote:
> Here is a set of VPMU changes that I thought might be useful.
>
> The first two patches are to avoid VMEXITs on certain MSR accesses. This
> is already part of VMX so I added similar SVM code
>
> The third patch should address the problem that Suravee mentioned on the
> list a few weeks ago (http://lists.xen.org/archives/html/xen-devel/2013-03/msg00087.html).
> It's a slightly different solution then what he suggested.
>
> 4th patch stops counters on AMD when VCPU is de-scheduled
>
> 5th is trivial Haswell support (new model number)
>
> 6th patch is trying to factor out common code from VMX and SVM.
>
> 7th is lazy VPMU save/restore. It is optimized for the case when CPUs are
> not over-subscribed and VCPU stays on the same processor most of the time.
> It is more beneficial on Intel processors because HW will keep track of
> guest/host global control register in VMCS and tehrefore we don't need to
> explicitly stop the counters. On AMD we do need to do this and so while
> there is improvement, it is not as pronounced.
>
> Here are some numbers that I managed to collect while running guests with
> oprofile. This is number of executed instructions in vpmu_save/vpmu_load.
>
> Eager VPMU Lazy VPMU
> Save Restore Save Restore
> Intel 181 225 46 50
> AMD 132 104 80 102
>
> When processors are oversubscribed, lazy restore may take about 2.5 times
> as many instructions as in the dedicated case if new VCPU jumps onto the
> processor (which doesn't happen on every context switch).
>
>
> -boris
>
>
> Boris Ostrovsky (8):
> x86/AMD: Allow more fine-grained control of VMCB MSR Permission Map
> x86/AMD: Do not intercept access to performance counters MSRs
> x86/AMD: Read VPMU MSRs from context when it is not loaded into HW
> x86/AMD: Stop counters on VPMU save
> x86/VPMU: Add Haswell support
> x86/VPMU: Factor out VPMU common code
> x86/VPMU: Save/restore VPMU only when necessary
> x86/AMD: Clean up context_update() in AMD VPMU code
>
> xen/arch/x86/domain.c | 14 ++-
> xen/arch/x86/hvm/svm/svm.c | 19 ++--
> xen/arch/x86/hvm/svm/vpmu.c | 188 +++++++++++++++++++++++--------
> xen/arch/x86/hvm/vmx/vmx.c | 2 -
> xen/arch/x86/hvm/vmx/vpmu_core2.c | 48 ++++----
> xen/arch/x86/hvm/vpmu.c | 114 +++++++++++++++++--
> xen/include/asm-x86/hvm/svm/vmcb.h | 8 +-
> xen/include/asm-x86/hvm/vmx/vpmu_core2.h | 1 -
> xen/include/asm-x86/hvm/vpmu.h | 6 +-
> 9 files changed, 296 insertions(+), 104 deletions(-)
>
next prev parent reply other threads:[~2013-04-10 18:49 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-09 17:26 [PATCH 0/8] Various VPMU patches Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 1/8] x86/AMD: Allow more fine-grained control of VMCB MSR Permission Map Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 2/8] x86/AMD: Do not intercept access to performance counters MSRs Boris Ostrovsky
2013-04-10 13:25 ` Jan Beulich
2013-04-09 17:26 ` [PATCH 3/8] x86/AMD: Read VPMU MSRs from context when it is not loaded into HW Boris Ostrovsky
2013-04-11 18:26 ` Suravee Suthikulpanit
2013-04-11 18:34 ` Boris Ostrovsky
2013-04-11 19:30 ` Suravee Suthikulpanit
2013-04-16 15:41 ` Konrad Rzeszutek Wilk
2013-04-16 17:12 ` Jacob Shin
2013-04-16 18:36 ` Konrad Rzeszutek Wilk
2013-06-19 22:56 ` Suravee Suthikulanit
2013-06-19 23:32 ` Boris Ostrovsky
2013-06-19 23:53 ` Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 4/8] x86/AMD: Stop counters on VPMU save Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 5/8] x86/VPMU: Add Haswell support Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 6/8] x86/VPMU: Factor out VPMU common code Boris Ostrovsky
2013-04-10 16:03 ` Nakajima, Jun
2013-04-09 17:26 ` [PATCH 7/8] x86/VPMU: Save/restore VPMU only when necessary Boris Ostrovsky
2013-04-10 8:57 ` Dietmar Hahn
2013-04-10 12:53 ` Boris Ostrovsky
2013-04-09 17:26 ` [PATCH 8/8] x86/AMD: Clean up context_update() in AMD VPMU code Boris Ostrovsky
2013-04-11 19:48 ` Suravee Suthikulpanit
2013-04-11 20:42 ` Boris Ostrovsky
2013-04-10 8:57 ` [PATCH 0/8] Various VPMU patches Dietmar Hahn
2013-04-10 18:49 ` Suravee Suthikulanit [this message]
2013-04-10 19:10 ` Boris Ostrovsky
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