From: Julien Grall <julien.grall@linaro.org>
To: Andrii Anisov <andrii.anisov@globallogic.com>
Cc: "xen-devel@lists.xen.org" <xen-devel@lists.xen.org>
Subject: Re: arm: How DomU access to iomem is implemented
Date: Mon, 10 Jun 2013 11:38:36 +0100 [thread overview]
Message-ID: <51B5ACAC.9050303@linaro.org> (raw)
In-Reply-To: <CAGQvs6hmbmxEQ0DYrQZXjY2YtCaFVLyJiZ=RjVochj4GznR+Gw@mail.gmail.com>
On 06/08/2013 01:49 PM, Andrii Anisov wrote:
> Hello,
Hello,
> Could you please clarify how DomU gets an access to iomem (for ARMv7VE)?
> We traced that iomem configuration of the DomU comes to hypervisor with
> /XEN_DOMCTL_iomem_permission/ domctl. Here iomem space is added to
> domain's /iomem_caps/ ranges. But we did not found how these ranges are
> actually mapped for DomU. Really these configuration looks unused, on
> our board DomU is killed by hypervisor once it tries to access f.e. real
> UART.
You need to use XEN_DOMCTL_memory_mapping. It will give access and map
region in the guest.
This hypercall is still missing on ARM, so you need to implement it.
> Actually we did a workaround by mapping regions using
> /map_mmio_regions() /right here in /XEN_DOMCTL_iomem_permission/
> handling. But it's a real hack, and it would good to know proper way to
> get stuff working.
Your solution with map_mmio_regions looks good for me.
Cheers,
--
Julien
next prev parent reply other threads:[~2013-06-10 10:38 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-08 12:49 arm: How DomU access to iomem is implemented Andrii Anisov
2013-06-10 10:38 ` Julien Grall [this message]
2013-06-10 10:58 ` Andrii Anisov
2013-06-10 11:13 ` Julien Grall
2013-06-10 16:19 ` Stefano Stabellini
2013-06-14 6:41 ` Andrii Anisov
2013-06-10 16:16 ` Stefano Stabellini
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