arm: How DomU access to iomem is implemented

arm: How DomU access to iomem is implemented

[Andrii Anisov]

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Hello,

Could you please clarify how DomU gets an access to iomem (for ARMv7VE)?
We traced that iomem configuration of the DomU comes to hypervisor with *
XEN_DOMCTL_iomem_permission* domctl. Here iomem space is added to domain's *
iomem_caps* ranges. But we did not found how these ranges are actually
mapped for DomU. Really these configuration looks unused, on our board DomU
is killed by hypervisor once it tries to access f.e. real UART.

Actually we did a workaround by mapping regions using
*map_mmio_regions() *right
here in *XEN_DOMCTL_iomem_permission* handling. But it's a real hack, and
it would good to know proper way to get stuff working.


Sincerely,
Andrii Anisov.

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Re: arm: How DomU access to iomem is implemented

[Julien Grall]

On 06/08/2013 01:49 PM, Andrii Anisov wrote:

> Hello,

Hello,

> Could you please clarify how DomU gets an access to iomem (for ARMv7VE)?

> We traced that iomem configuration of the DomU comes to hypervisor with
> /XEN_DOMCTL_iomem_permission/ domctl. Here iomem space is added to
> domain's /iomem_caps/ ranges. But we did not found how these ranges are
> actually mapped for DomU. Really these configuration looks unused, on
> our board DomU is killed by hypervisor once it tries to access f.e. real
> UART.


You need to use XEN_DOMCTL_memory_mapping. It will give access and map
region in the guest.
This hypercall is still missing on ARM, so you need to implement it.

> Actually we did a workaround by mapping regions using
> /map_mmio_regions() /right here in /XEN_DOMCTL_iomem_permission/
> handling. But it's a real hack, and it would good to know proper way to
> get stuff working.


Your solution with map_mmio_regions looks good for me.

Cheers,

-- 
Julien

Re: arm: How DomU access to iomem is implemented

[Andrii Anisov]

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Julien,

Thank you for answer.
As I understand with HW IRQ routing the situation is pretty the same?


Andrii Anisov | Software Engineer
GlobalLogic
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On Mon, Jun 10, 2013 at 1:38 PM, Julien Grall <julien.grall@linaro.org>wrote:

> On 06/08/2013 01:49 PM, Andrii Anisov wrote:
>
> > Hello,
>
> Hello,
>
> > Could you please clarify how DomU gets an access to iomem (for ARMv7VE)?
>
> > We traced that iomem configuration of the DomU comes to hypervisor with
> > /XEN_DOMCTL_iomem_permission/ domctl. Here iomem space is added to
> > domain's /iomem_caps/ ranges. But we did not found how these ranges are
> > actually mapped for DomU. Really these configuration looks unused, on
> > our board DomU is killed by hypervisor once it tries to access f.e. real
> > UART.
>
>
> You need to use XEN_DOMCTL_memory_mapping. It will give access and map
> region in the guest.
> This hypercall is still missing on ARM, so you need to implement it.
>
> > Actually we did a workaround by mapping regions using
> > /map_mmio_regions() /right here in /XEN_DOMCTL_iomem_permission/
> > handling. But it's a real hack, and it would good to know proper way to
> > get stuff working.
>
>
> Your solution with map_mmio_regions looks good for me.
>
> Cheers,
>
> --
> Julien
>
>

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Re: arm: How DomU access to iomem is implemented

[Julien Grall]

On 06/10/2013 11:58 AM, Andrii Anisov wrote:

> Julien,
> 
> Thank you for answer.
> As I understand with HW IRQ routing the situation is pretty the same?
> 


Yes.

-- 
Julien

Re: arm: How DomU access to iomem is implemented

[Stefano Stabellini]

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On Sat, 8 Jun 2013, Andrii Anisov wrote:
> Hello,
> Could you please clarify how DomU gets an access to iomem (for ARMv7VE)?
> We traced that iomem configuration of the DomU comes to hypervisor with XEN_DOMCTL_iomem_permission domctl. Here iomem space is
> added to domain's iomem_caps ranges. But we did not found how these ranges are actually mapped for DomU. Really these
> configuration looks unused, on our board DomU is killed by hypervisor once it tries to access f.e. real UART.
> 
> Actually we did a workaround by mapping regions using map_mmio_regions() right here in XEN_DOMCTL_iomem_permission handling. But
> it's a real hack, and it would good to know proper way to get stuff working.

Unfortunately we didn't get around to implementing device assignment
yet, so for the moment you might have to use workarounds to get it to
work.

In any cases XEN_DOMCTL_iomem_permission is used with PV guests that
don't use nested paging (second state translation) in hardware, so it is
not the right hypercall to call for ARM guests.

Like Julien wrote, the right hypercall to call is
xc_domain_memory_mapping/XEN_DOMCTL_memory_mapping, that is missing on
ARM. However you should be able to write it, basing your implementation
on map_mmio_regions.

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Re: arm: How DomU access to iomem is implemented

[Stefano Stabellini]

On Mon, 10 Jun 2013, Andrii Anisov wrote:
> Julien,
> Thank you for answer.
> As I understand with HW IRQ routing the situation is pretty the same?

Yes, that's correct. When we do implement device assignment we'll have
to go through all these issues.  I expect we'll end up writing something
like xc_physdev_map_pirq/PHYSDEVOP_map_pirq.

Re: arm: How DomU access to iomem is implemented

[Andrii Anisov]

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Stefano,

Thank you for your comments.

Sincerely,
Andrii Anisov

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