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From: Suravee Suthikulanit <suravee.suthikulpanit@amd.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Tim Deegan <tim@xen.org>, xen-devel@lists.xen.org
Subject: Re: [PATCH 1/2 v5] iommu/amd: Fix logic for clearing the IOMMU interrupt bits
Date: Tue, 11 Jun 2013 18:03:17 -0500	[thread overview]
Message-ID: <51B7ACB5.7070805@amd.com> (raw)
In-Reply-To: <51B6E40A02000078000DCF6C@nat28.tlf.novell.com>

On 6/11/2013 1:47 AM, Jan Beulich wrote:
> @@ -611,22 +608,33 @@ static void iommu_check_event_log(struct
>       u32 entry;
>       unsigned long flags;
>   
> +    /* RW1C interrupt status bit */
> +    writel(IOMMU_STATUS_EVENT_LOG_INT_MASK,
> +           iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
> +
>       iommu_read_log(iommu, &iommu->event_log,
>                      sizeof(event_entry_t), parse_event_log_entry);
>   
>       spin_lock_irqsave(&iommu->lock, flags);
>       
> -    /*check event overflow */
> +    /* Check event overflow. */
>       entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
> -
>       if ( iommu_get_bit(entry, IOMMU_STATUS_EVENT_OVERFLOW_SHIFT) )
>           iommu_reset_log(iommu, &iommu->event_log, set_iommu_event_log_control);
> -
> -    /* reset interrupt status bit */
> -    entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
> -    iommu_set_bit(&entry, IOMMU_STATUS_EVENT_LOG_INT_SHIFT);
> -
> -    writel(entry, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
> +    else
> +    {
> +        entry = readl(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
> +        if ( !(entry & IOMMU_CONTROL_EVENT_LOG_INT_MASK) )
> +        {
> +            entry |= IOMMU_CONTROL_EVENT_LOG_INT_MASK;
> +            writel(entry, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
> +            /*
> +             * Re-schedule the tasklet to handle eventual log entries added
> +             * between reading the log above and re-enabling the interrupt.
> +             */
> +            tasklet_schedule(&amd_iommu_irq_tasklet);
> +        }
> +    }
If more entries are added to the event log during the time that event 
log interrupt is disabled (in the control register),
the IOMMU hardware will generate interrupt once the the interrupt enable 
bit in the control register changes from 0 to 1 and set the status 
register.  Since the "iommu_interrupt_handler" code is already calling 
"schedule_tasklet",  we should not need to "re-schedule" tasklet here.  
I have confirmed the hardware behavior described with the hardware 
designer.  This is also the same on the PPR log.

Suravee

  reply	other threads:[~2013-06-11 23:03 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-10  5:05 [PATCH 1/2 V2] iommu/amd: Fix logic for clearing the IOMMU interrupt bits suravee.suthikulpanit
2013-06-10  5:05 ` [PATCH 2/2 V2] iommu/amd: Workaround for erratum 787 suravee.suthikulpanit
2013-06-10  9:35   ` Tim Deegan
2013-06-10  9:47     ` Jan Beulich
2013-06-10 10:40       ` Tim Deegan
2013-06-10 10:53         ` Jan Beulich
2013-06-10 12:43           ` Tim Deegan
2013-06-10 13:23             ` Jan Beulich
2013-06-10 13:41             ` Jan Beulich
2013-06-10 13:56               ` Tim Deegan
2013-06-10 13:55             ` Jan Beulich
2013-06-10 15:03               ` Jan Beulich
2013-06-10 16:31                 ` Tim Deegan
2013-06-10 23:13                   ` Suravee Suthikulanit
2013-06-11  6:45                     ` Jan Beulich
2013-06-11  6:40                   ` Jan Beulich
2013-06-11  8:53                     ` Tim Deegan
2013-06-10 13:53           ` Suravee Suthikulanit
2013-06-10 13:59             ` Jan Beulich
2013-06-10 15:11               ` Suravee Suthikulanit
2013-06-10 15:21                 ` Jan Beulich
2013-06-10 10:59   ` [PATCH 2/2 v3] " Jan Beulich
2013-06-11  6:47     ` [PATCH 2/2 v5] " Jan Beulich
2013-06-17 18:57       ` Suravee Suthikulanit
2013-06-10 10:05 ` [PATCH 1/2 V2] iommu/amd: Fix logic for clearing the IOMMU interrupt bits Jan Beulich
2013-06-10 10:56 ` [PATCH 1/2 v3] " Jan Beulich
2013-06-10 11:02   ` Jan Beulich
2013-06-10 12:18   ` Tim Deegan
2013-06-10 12:31     ` Jan Beulich
2013-06-10 13:58       ` Suravee Suthikulanit
2013-06-10 12:41     ` [PATCH 1/2 v4] " Jan Beulich
2013-06-10 12:46       ` Tim Deegan
2013-06-10 13:49       ` George Dunlap
2013-06-10 14:08         ` Jan Beulich
2013-06-11  6:47       ` [PATCH 1/2 v5] " Jan Beulich
2013-06-11 23:03         ` Suravee Suthikulanit [this message]
2013-06-12  6:24           ` Jan Beulich
2013-06-12 22:37             ` Suravee Suthikulpanit
2013-06-13  1:44               ` Suravee Suthikulpanit
2013-06-13  7:54                 ` Jan Beulich
2013-06-13 13:48                   ` Suravee Suthikulpanit
2013-06-13 14:20                 ` George Dunlap
2013-06-13 14:30                   ` Processed: " xen
2013-06-13 15:58                 ` Jan Beulich
2013-06-13 16:34                   ` Suravee Suthikulanit
2013-06-14  6:27                     ` Jan Beulich
2013-06-14  6:40                       ` Jan Beulich
2013-06-14  7:14                         ` [PATCH] AMD IOMMU: make interrupt work again Jan Beulich
2013-06-14 16:10                           ` Suravee Suthikulanit
2013-06-17 18:59             ` [PATCH 1/2 v5] iommu/amd: Fix logic for clearing the IOMMU interrupt bits Suravee Suthikulanit

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