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From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: "Shin, Jacob" <Jacob.Shin@amd.com>,
	xen-devel@lists.xen.org, Tim Deegan <tim@xen.org>,
	"Hurwitz, Sherry" <sherry.hurwitz@amd.com>
Subject: Re: [PATCH 1/2 v5] iommu/amd: Fix logic for clearing the IOMMU interrupt bits
Date: Wed, 12 Jun 2013 20:44:17 -0500	[thread overview]
Message-ID: <51B923F1.7000802@amd.com> (raw)
In-Reply-To: <51B8F814.70202@amd.com>

On 6/12/2013 5:37 PM, Suravee Suthikulpanit wrote:
> On 6/12/2013 1:24 AM, Jan Beulich wrote:
>>> If more entries are added to the event log during the time that event
>>> log interrupt is disabled (in the control register),
>>> the IOMMU hardware will generate interrupt once the the interrupt 
>>> enable
>>> bit in the control register changes from 0 to 1 and set the status
>>> register.  Since the "iommu_interrupt_handler" code is already calling
>>> "schedule_tasklet",  we should not need to "re-schedule" tasklet here.
>>> I have confirmed the hardware behavior described with the hardware
>>> designer.  This is also the same on the PPR log.
>> And also the same between v1 and v2 hardware? Again, I'd like to
>> be on the safe side, and rather do a reschedule too much than one
>> too little. And in any case, having your documentation made more
>> precise in these respects would be much appreciated.
>>
>> Jan
>>
>>
> Understand.  I apologize if the AMD IOMMU specification does not 
> describe the behavior quite clearly.  Let me know if I could help 
> clarifing any issues with the hardware designers.
>
> Since we are modifying the IOMMU interrupt enabling/disabling, I have 
> been doing some more testing on the IOMMU interrupt handling. I found 
> that IOMMU MSI interrupt is currently broken, but I think this is 
> because of some older changes.  I am still tracking down the issue, 
> and will update my findings.
>
> Thank you,
>
> Suravee

The following commit broke the IOMMU MSI interrupt:

2012-11-28    899110e3f6d2a191638e8b50a981c551eeec49e6 AMD IOMMU: 
include IOMMU interrupt information in 'M' debug key output
(http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=899110e3f6d2a191638e8b50a981c551eeec49e6)

This patch also need the following patch to resolve kernel panic:

c759fee45bf44f2947a3480d54c03ff7e028c39e AMD IOMMU: add locking missing 
from c/s 26198:ba90ecb0231f
(http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=c759fee45bf44f2947a3480d54c03ff7e028c39e)

I'll update once I root cause the issue.

Suravee

>
> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.xen.org
> http://lists.xen.org/xen-devel
>

  reply	other threads:[~2013-06-13  1:44 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-06-10  5:05 [PATCH 1/2 V2] iommu/amd: Fix logic for clearing the IOMMU interrupt bits suravee.suthikulpanit
2013-06-10  5:05 ` [PATCH 2/2 V2] iommu/amd: Workaround for erratum 787 suravee.suthikulpanit
2013-06-10  9:35   ` Tim Deegan
2013-06-10  9:47     ` Jan Beulich
2013-06-10 10:40       ` Tim Deegan
2013-06-10 10:53         ` Jan Beulich
2013-06-10 12:43           ` Tim Deegan
2013-06-10 13:23             ` Jan Beulich
2013-06-10 13:41             ` Jan Beulich
2013-06-10 13:56               ` Tim Deegan
2013-06-10 13:55             ` Jan Beulich
2013-06-10 15:03               ` Jan Beulich
2013-06-10 16:31                 ` Tim Deegan
2013-06-10 23:13                   ` Suravee Suthikulanit
2013-06-11  6:45                     ` Jan Beulich
2013-06-11  6:40                   ` Jan Beulich
2013-06-11  8:53                     ` Tim Deegan
2013-06-10 13:53           ` Suravee Suthikulanit
2013-06-10 13:59             ` Jan Beulich
2013-06-10 15:11               ` Suravee Suthikulanit
2013-06-10 15:21                 ` Jan Beulich
2013-06-10 10:59   ` [PATCH 2/2 v3] " Jan Beulich
2013-06-11  6:47     ` [PATCH 2/2 v5] " Jan Beulich
2013-06-17 18:57       ` Suravee Suthikulanit
2013-06-10 10:05 ` [PATCH 1/2 V2] iommu/amd: Fix logic for clearing the IOMMU interrupt bits Jan Beulich
2013-06-10 10:56 ` [PATCH 1/2 v3] " Jan Beulich
2013-06-10 11:02   ` Jan Beulich
2013-06-10 12:18   ` Tim Deegan
2013-06-10 12:31     ` Jan Beulich
2013-06-10 13:58       ` Suravee Suthikulanit
2013-06-10 12:41     ` [PATCH 1/2 v4] " Jan Beulich
2013-06-10 12:46       ` Tim Deegan
2013-06-10 13:49       ` George Dunlap
2013-06-10 14:08         ` Jan Beulich
2013-06-11  6:47       ` [PATCH 1/2 v5] " Jan Beulich
2013-06-11 23:03         ` Suravee Suthikulanit
2013-06-12  6:24           ` Jan Beulich
2013-06-12 22:37             ` Suravee Suthikulpanit
2013-06-13  1:44               ` Suravee Suthikulpanit [this message]
2013-06-13  7:54                 ` Jan Beulich
2013-06-13 13:48                   ` Suravee Suthikulpanit
2013-06-13 14:20                 ` George Dunlap
2013-06-13 14:30                   ` Processed: " xen
2013-06-13 15:58                 ` Jan Beulich
2013-06-13 16:34                   ` Suravee Suthikulanit
2013-06-14  6:27                     ` Jan Beulich
2013-06-14  6:40                       ` Jan Beulich
2013-06-14  7:14                         ` [PATCH] AMD IOMMU: make interrupt work again Jan Beulich
2013-06-14 16:10                           ` Suravee Suthikulanit
2013-06-17 18:59             ` [PATCH 1/2 v5] iommu/amd: Fix logic for clearing the IOMMU interrupt bits Suravee Suthikulanit

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